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author | whitequark <whitequark@whitequark.org> | 2020-04-14 12:12:50 +0000 |
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committer | whitequark <whitequark@whitequark.org> | 2020-04-14 12:12:50 +0000 |
commit | 9c64d37a4c3279ca037d4eae79f6ea60ca582457 (patch) | |
tree | a7c9033d16954d3e3296c6be597b26e00152f64d /backends | |
parent | 102fb5424fa1e7be59786925bd3a10f5d46fa904 (diff) | |
download | yosys-9c64d37a4c3279ca037d4eae79f6ea60ca582457.tar.gz yosys-9c64d37a4c3279ca037d4eae79f6ea60ca582457.tar.bz2 yosys-9c64d37a4c3279ca037d4eae79f6ea60ca582457.zip |
write_verilog: fix precondition check.
Diffstat (limited to 'backends')
-rw-r--r-- | backends/verilog/verilog_backend.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/backends/verilog/verilog_backend.cc b/backends/verilog/verilog_backend.cc index 5467e250b..11b2ae10f 100644 --- a/backends/verilog/verilog_backend.cc +++ b/backends/verilog/verilog_backend.cc @@ -1984,7 +1984,7 @@ struct VerilogBackend : public Backend { extra_args(f, filename, args, argidx); if (extmem) { - if (filename.empty()) + if (filename == "<stdout>") log_cmd_error("Option -extmem must be used with a filename.\n"); extmem_prefix = filename.substr(0, filename.rfind('.')); } |