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author | Clifford Wolf <clifford@clifford.at> | 2016-10-12 01:18:39 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2016-10-12 01:18:39 +0200 |
commit | 8ebba8a35f0a5dbf3a044ab84575edfc46c99d77 (patch) | |
tree | 180fce8de63b6908d00ccefb59a6f9a3a930b5a4 /backends | |
parent | 4a981a3bd81836cd15059db56f01b60b11068742 (diff) | |
download | yosys-8ebba8a35f0a5dbf3a044ab84575edfc46c99d77.tar.gz yosys-8ebba8a35f0a5dbf3a044ab84575edfc46c99d77.tar.bz2 yosys-8ebba8a35f0a5dbf3a044ab84575edfc46c99d77.zip |
Added $ff and $_FF_ cell types
Diffstat (limited to 'backends')
-rw-r--r-- | backends/blif/blif.cc | 6 | ||||
-rw-r--r-- | backends/smt2/smt2.cc | 10 |
2 files changed, 11 insertions, 5 deletions
diff --git a/backends/blif/blif.cc b/backends/blif/blif.cc index 6a379e67f..0dc17c92a 100644 --- a/backends/blif/blif.cc +++ b/backends/blif/blif.cc @@ -315,6 +315,12 @@ struct BlifDumper continue; } + if (!config->icells_mode && cell->type == "$_FF_") { + f << stringf(".latch %s %s%s\n", cstr(cell->getPort("\\D")), cstr(cell->getPort("\\Q")), + cstr_init(cell->getPort("\\Q"))); + continue; + } + if (!config->icells_mode && cell->type == "$_DFF_N_") { f << stringf(".latch %s %s fe %s%s\n", cstr(cell->getPort("\\D")), cstr(cell->getPort("\\Q")), cstr(cell->getPort("\\C")), cstr_init(cell->getPort("\\Q"))); diff --git a/backends/smt2/smt2.cc b/backends/smt2/smt2.cc index 9a25f3a23..487f5befb 100644 --- a/backends/smt2/smt2.cc +++ b/backends/smt2/smt2.cc @@ -379,7 +379,7 @@ struct Smt2Worker return; } - if (cell->type == "$_DFF_P_" || cell->type == "$_DFF_N_") + if (cell->type.in("$_FF_", "$_DFF_P_", "$_DFF_N_")) { registers.insert(cell); decls.push_back(stringf("(declare-fun |%s#%d| (|%s_s|) Bool) ; %s\n", @@ -407,7 +407,7 @@ struct Smt2Worker if (bvmode) { - if (cell->type == "$dff") + if (cell->type.in("$ff", "$dff")) { registers.insert(cell); decls.push_back(stringf("(declare-fun |%s#%d| (|%s_s|) (_ BitVec %d)) ; %s\n", @@ -596,7 +596,7 @@ struct Smt2Worker pool<SigBit> reg_bits; for (auto cell : module->cells()) - if (cell->type.in("$_DFF_P_", "$_DFF_N_", "$dff")) { + if (cell->type.in("$ff", "$dff", "$_FF_", "$_DFF_P_", "$_DFF_N_")) { // not using sigmap -- we want the net directly at the dff output for (auto bit : cell->getPort("\\Q")) reg_bits.insert(bit); @@ -674,14 +674,14 @@ struct Smt2Worker for (auto cell : this_regs) { - if (cell->type == "$_DFF_P_" || cell->type == "$_DFF_N_") + if (cell->type.in("$_FF_", "$_DFF_P_", "$_DFF_N_")) { std::string expr_d = get_bool(cell->getPort("\\D")); std::string expr_q = get_bool(cell->getPort("\\Q"), "next_state"); trans.push_back(stringf(" (= %s %s) ; %s %s\n", expr_d.c_str(), expr_q.c_str(), get_id(cell), log_signal(cell->getPort("\\Q")))); } - if (cell->type == "$dff") + if (cell->type.in("$ff", "$dff")) { std::string expr_d = get_bv(cell->getPort("\\D")); std::string expr_q = get_bv(cell->getPort("\\Q"), "next_state"); |