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| author | Clifford Wolf <clifford@clifford.at> | 2018-03-27 02:11:20 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2018-03-27 02:11:20 +0200 |
| commit | 77bd645c35225d4fa1a1c632457acfb47b7388eb (patch) | |
| tree | 17bc772fe426b764a78f0fd1fc5759c97f1640da /backends | |
| parent | 6f681c4f8296d5776d7773c2f7eb62398bf11507 (diff) | |
| download | yosys-77bd645c35225d4fa1a1c632457acfb47b7388eb.tar.gz yosys-77bd645c35225d4fa1a1c632457acfb47b7388eb.tar.bz2 yosys-77bd645c35225d4fa1a1c632457acfb47b7388eb.zip | |
Add $mem support to SMT2 clock tagging
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'backends')
| -rw-r--r-- | backends/smt2/smt2.cc | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/backends/smt2/smt2.cc b/backends/smt2/smt2.cc index 47c993d05..2fb6d4da9 100644 --- a/backends/smt2/smt2.cc +++ b/backends/smt2/smt2.cc @@ -135,6 +135,24 @@ struct Smt2Worker log_error("Unsupported or unknown directionality on port %s of cell %s.%s (%s).\n", log_id(conn.first), log_id(module), log_id(cell), log_id(cell->type)); + if (cell->type.in("$mem") && conn.first.in("\\RD_CLK", "\\WR_CLK")) + { + SigSpec clk = sigmap(conn.second); + for (int i = 0; i < GetSize(clk); i++) + { + if (clk[i].wire == nullptr) + continue; + + if (cell->getParam(conn.first == "\\RD_CLK" ? "\\RD_CLK_ENABLE" : "\\WR_CLK_ENABLE")[i] != State::S1) + continue; + + if (cell->getParam(conn.first == "\\RD_CLK" ? "\\RD_CLK_POLARITY" : "\\WR_CLK_POLARITY")[i] == State::S1) + clock_posedge.insert(clk[i]); + else + clock_negedge.insert(clk[i]); + } + } + else if (cell->type.in("$dff", "$_DFF_P_", "$_DFF_N_") && conn.first.in("\\CLK", "\\C")) { bool posedge = (cell->type == "$_DFF_N_") || (cell->type == "$dff" && cell->getParam("\\CLK_POLARITY").as_bool()); |