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| author | Clifford Wolf <clifford@clifford.at> | 2013-01-05 11:13:26 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-01-05 11:13:26 +0100 |
| commit | 7764d0ba1dcf064ae487ee985c43083a0909e7f4 (patch) | |
| tree | 18c05b8729df381af71b707748ce1d605e0df764 /backends/verilog/Makefile.inc | |
| download | yosys-7764d0ba1dcf064ae487ee985c43083a0909e7f4.tar.gz yosys-7764d0ba1dcf064ae487ee985c43083a0909e7f4.tar.bz2 yosys-7764d0ba1dcf064ae487ee985c43083a0909e7f4.zip | |
initial import
Diffstat (limited to 'backends/verilog/Makefile.inc')
| -rw-r--r-- | backends/verilog/Makefile.inc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/backends/verilog/Makefile.inc b/backends/verilog/Makefile.inc new file mode 100644 index 000000000..c2dffef7a --- /dev/null +++ b/backends/verilog/Makefile.inc @@ -0,0 +1,3 @@ + +OBJS += backends/verilog/verilog_backend.o + |