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authorRupert Swarbrick <rswarbrick@gmail.com>2020-05-26 16:21:38 +0100
committerRupert Swarbrick <rswarbrick@gmail.com>2020-05-26 16:50:42 +0100
commit7746bba69a781498a13157a9c544b34ced8ad0a8 (patch)
tree7ca334cb6646c90fe8c89f79cb8f8a0822f62fad /backends/verilog/Makefile.inc
parenta7f2ef6d34c4b336a910b3c6f3d2cc11da8a82b4 (diff)
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Simplify a modport check in hierarchy.cc
This code originally comes from commit 458a940. When an interface is used via a modport, code in genrtlil.cc sets '\\interface_type' and '\\interface_modport' properties on the wire. In hierarchy.cc, we pick up the modport name and add it to a dict called modports_used_in_submodule (that maps connection source to modport name). Before this patch, the modport name is retrieved as a strpool and then iterated over in an arbitrary order, discarding all entries but the last. In practice, the pool will always have 0 or 1 entries because the string used to construct it is a valid identifier, so doesn't contain any pipe symbols. This patch changes the code to retrieve the modport name as just a string. This will have the same effect in practice, but may be a bit less confusing! The code also gets moved down closer to where the result is used, which might be a bit more efficient since we won't always get as far as the check. The patch also removes some commented-out code, which I think was intended to add some typechecking at some point, but was never implemented. Since this dates back to October 2018, I think it makes more sense to just take it out.
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