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author | Clifford Wolf <clifford@clifford.at> | 2017-05-17 09:08:29 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2017-05-17 09:08:29 +0200 |
commit | 05cdd58c8dc73968992681d0ee1cbfa89880b94f (patch) | |
tree | 426fabb50c83d45f1194bd94125d4701242e920f /backends/simplec | |
parent | 9f4fbc5e74747c8973da3a2fd42d2ef40dbe1fa5 (diff) | |
download | yosys-05cdd58c8dc73968992681d0ee1cbfa89880b94f.tar.gz yosys-05cdd58c8dc73968992681d0ee1cbfa89880b94f.tar.bz2 yosys-05cdd58c8dc73968992681d0ee1cbfa89880b94f.zip |
Add $_ANDNOT_ and $_ORNOT_ gates
Diffstat (limited to 'backends/simplec')
-rw-r--r-- | backends/simplec/simplec.cc | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/backends/simplec/simplec.cc b/backends/simplec/simplec.cc index 15399831e..5768e3499 100644 --- a/backends/simplec/simplec.cc +++ b/backends/simplec/simplec.cc @@ -397,7 +397,7 @@ struct SimplecWorker return; } - if (cell->type.in("$_AND_", "$_NAND_", "$_OR_", "$_NOR_", "$_XOR_", "$_XNOR_")) + if (cell->type.in("$_AND_", "$_NAND_", "$_OR_", "$_NOR_", "$_XOR_", "$_XNOR_", "$_ANDNOT_", "$_ORNOT_")) { SigBit a = sigmaps.at(work->module)(cell->getPort("\\A")); SigBit b = sigmaps.at(work->module)(cell->getPort("\\B")); @@ -407,12 +407,14 @@ struct SimplecWorker string b_expr = b.wire ? util_get_bit(work->prefix + cid(b.wire->name), b.wire->width, b.offset) : b.data ? "1" : "0"; string expr; - if (cell->type == "$_AND_") expr = stringf("%s & %s", a_expr.c_str(), b_expr.c_str()); - if (cell->type == "$_NAND_") expr = stringf("!(%s & %s)", a_expr.c_str(), b_expr.c_str()); - if (cell->type == "$_OR_") expr = stringf("%s | %s", a_expr.c_str(), b_expr.c_str()); - if (cell->type == "$_NOR_") expr = stringf("!(%s | %s)", a_expr.c_str(), b_expr.c_str()); - if (cell->type == "$_XOR_") expr = stringf("%s ^ %s", a_expr.c_str(), b_expr.c_str()); - if (cell->type == "$_XNOR_") expr = stringf("!(%s ^ %s)", a_expr.c_str(), b_expr.c_str()); + if (cell->type == "$_AND_") expr = stringf("%s & %s", a_expr.c_str(), b_expr.c_str()); + if (cell->type == "$_NAND_") expr = stringf("!(%s & %s)", a_expr.c_str(), b_expr.c_str()); + if (cell->type == "$_OR_") expr = stringf("%s | %s", a_expr.c_str(), b_expr.c_str()); + if (cell->type == "$_NOR_") expr = stringf("!(%s | %s)", a_expr.c_str(), b_expr.c_str()); + if (cell->type == "$_XOR_") expr = stringf("%s ^ %s", a_expr.c_str(), b_expr.c_str()); + if (cell->type == "$_XNOR_") expr = stringf("!(%s ^ %s)", a_expr.c_str(), b_expr.c_str()); + if (cell->type == "$_ANDNOT_") expr = stringf("%s & (!%s)", a_expr.c_str(), b_expr.c_str()); + if (cell->type == "$_ORNOT_") expr = stringf("%s | (!%s)", a_expr.c_str(), b_expr.c_str()); log_assert(y.wire); funct_declarations.push_back(util_set_bit(work->prefix + cid(y.wire->name), y.wire->width, y.offset, expr) + |