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| author | whitequark <whitequark@whitequark.org> | 2020-06-13 00:49:44 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2020-06-13 00:49:44 +0000 |
| commit | 6cf02ed94f46d32e6116ba834894f4022fb0d407 (patch) | |
| tree | c75e0ca2462e546b575f568dc915528561209405 /backends/cxxrtl/cxxrtl.h | |
| parent | a5f0cb4eba5d78f31c31a7c21b0dd0309363cd38 (diff) | |
| download | yosys-6cf02ed94f46d32e6116ba834894f4022fb0d407.tar.gz yosys-6cf02ed94f46d32e6116ba834894f4022fb0d407.tar.bz2 yosys-6cf02ed94f46d32e6116ba834894f4022fb0d407.zip | |
cxxrtl: fix rzext().
This was a correctness issue, but one of the consequences is that it
resulted in jumps in generated machine code where there should have
been none. As a side effect of fixing the bug, Minerva SoC became 10%
faster.
Diffstat (limited to 'backends/cxxrtl/cxxrtl.h')
| -rw-r--r-- | backends/cxxrtl/cxxrtl.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/backends/cxxrtl/cxxrtl.h b/backends/cxxrtl/cxxrtl.h index ce21cc1e6..10184bb3f 100644 --- a/backends/cxxrtl/cxxrtl.h +++ b/backends/cxxrtl/cxxrtl.h @@ -165,8 +165,8 @@ struct value : public expr_base<value<Bits>> { carry = (shift_bits == 0) ? 0 : data[n] >> (chunk::bits - shift_bits); } - if (carry != 0) - result.data[result.chunks - 1] = carry; + if (shift_chunks + chunks < result.chunks) + result.data[shift_chunks + chunks] = carry; return result; } |