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author | Alberto Gonzalez <boqwxp@airmail.cc> | 2020-04-01 05:50:48 +0000 |
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committer | Alberto Gonzalez <boqwxp@airmail.cc> | 2020-04-01 05:50:48 +0000 |
commit | 24ef73904ff7c4fce81e0162593c2dee0c565454 (patch) | |
tree | fe3b4591a8eb8d9bf5ef06d4a15345f51532ee07 /backends/blif/blif.cc | |
parent | f657fed24cb930900e31f72c33292b37d1bddf72 (diff) | |
download | yosys-24ef73904ff7c4fce81e0162593c2dee0c565454.tar.gz yosys-24ef73904ff7c4fce81e0162593c2dee0c565454.tar.bz2 yosys-24ef73904ff7c4fce81e0162593c2dee0c565454.zip |
Clean up pseudo-private member usage in `backends/blif/blif.cc`.
Diffstat (limited to 'backends/blif/blif.cc')
-rw-r--r-- | backends/blif/blif.cc | 26 |
1 files changed, 11 insertions, 15 deletions
diff --git a/backends/blif/blif.cc b/backends/blif/blif.cc index b6e38c16c..4bdaf7a7f 100644 --- a/backends/blif/blif.cc +++ b/backends/blif/blif.cc @@ -138,9 +138,9 @@ struct BlifDumper { if (!config->gates_mode) return "subckt"; - if (!design->modules_.count(RTLIL::escape_id(cell_type))) + if (design->module(RTLIL::escape_id(cell_type)) == nullptr) return "gate"; - if (design->modules_.at(RTLIL::escape_id(cell_type))->get_blackbox_attribute()) + if (design->module(RTLIL::escape_id(cell_type))->get_blackbox_attribute()) return "gate"; return "subckt"; } @@ -148,7 +148,7 @@ struct BlifDumper void dump_params(const char *command, dict<IdString, Const> ¶ms) { for (auto ¶m : params) { - f << stringf("%s %s ", command, RTLIL::id2cstr(param.first)); + f << stringf("%s %s ", command, log_id(param.first)); if (param.second.flags & RTLIL::CONST_FLAG_STRING) { std::string str = param.second.decode_string(); f << stringf("\""); @@ -172,8 +172,7 @@ struct BlifDumper std::map<int, RTLIL::Wire*> inputs, outputs; - for (auto &wire_it : module->wires_) { - RTLIL::Wire *wire = wire_it.second; + for (auto wire : module->wires()) { if (wire->port_input) inputs[wire->port_id] = wire; if (wire->port_output) @@ -229,10 +228,8 @@ struct BlifDumper f << stringf(".names $undef\n"); } - for (auto &cell_it : module->cells_) + for (auto cell : module->cells()) { - RTLIL::Cell *cell = cell_it.second; - if (config->unbuf_types.count(cell->type)) { auto portnames = config->unbuf_types.at(cell->type); f << stringf(".names %s %s\n1 1\n", @@ -649,25 +646,24 @@ struct BlifBackend : public Backend { extra_args(f, filename, args, argidx); if (top_module_name.empty()) - for (auto & mod_it:design->modules_) - if (mod_it.second->get_bool_attribute("\\top")) - top_module_name = mod_it.first.str(); + for (auto module : design->modules()) + if (module->get_bool_attribute("\\top")) + top_module_name = module->name.str(); *f << stringf("# Generated by %s\n", yosys_version_str); std::vector<RTLIL::Module*> mod_list; design->sort(); - for (auto module_it : design->modules_) + for (auto module : design->modules()) { - RTLIL::Module *module = module_it.second; if (module->get_blackbox_attribute() && !config.blackbox_mode) continue; if (module->processes.size() != 0) - log_error("Found unmapped processes in module %s: unmapped processes are not supported in BLIF backend!\n", RTLIL::id2cstr(module->name)); + log_error("Found unmapped processes in module %s: unmapped processes are not supported in BLIF backend!\n", log_id(module->name)); if (module->memories.size() != 0) - log_error("Found unmapped memories in module %s: unmapped memories are not supported in BLIF backend!\n", RTLIL::id2cstr(module->name)); + log_error("Found unmapped memories in module %s: unmapped memories are not supported in BLIF backend!\n", log_id(module->name)); if (module->name == RTLIL::escape_id(top_module_name)) { BlifDumper::dump(*f, module, design, config); |