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author | Clifford Wolf <clifford@clifford.at> | 2015-11-12 13:15:19 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2015-11-12 13:15:19 +0100 |
commit | fd3e10c2955242e9d1c5438da84b4a2341e79173 (patch) | |
tree | 7fa1074c3c19205a052c827e5b9ff45fa070007e /README | |
parent | 7ae3d1b5a99edf84fd543fe78ed68b0470005959 (diff) | |
download | yosys-fd3e10c2955242e9d1c5438da84b4a2341e79173.tar.gz yosys-fd3e10c2955242e9d1c5438da84b4a2341e79173.tar.bz2 yosys-fd3e10c2955242e9d1c5438da84b4a2341e79173.zip |
Link to vlsitechnology.org for liberty files
Diffstat (limited to 'README')
-rw-r--r-- | README | 10 |
1 files changed, 4 insertions, 6 deletions
@@ -192,13 +192,11 @@ for the given cell library: If you do not have a liberty file but want to test this synthesis script, you can use the file examples/cmos/cmos_cells.lib from the yosys sources. -Various more complex liberty files (for testing) can be found here: +Liberty file downloads for and information about free and open ASIC standard +cell libraries can be found here: - http://vlsiarch.ecen.okstate.edu/flows/MOSIS_SCMOS/latest/.. - ../cadence/lib/tsmc025/signalstorm/osu025_stdcells.lib - ../cadence/lib/ami035/signalstorm/osu035_stdcells.lib - ../cadence/lib/tsmc018/signalstorm/osu018_stdcells.lib - ../cadence/lib/ami05/signalstorm/osu05_stdcells.lib + http://www.vlsitechnology.org/html/libraries.html + http://www.vlsitechnology.org/synopsys/vsclib013.lib The command "synth" provides a good default synthesis script (see "help synth"). If possible a synthesis script should borrow from "synth". For example: |