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| author | Miodrag Milanovic <mmicko@gmail.com> | 2021-08-20 10:19:04 +0200 |
|---|---|---|
| committer | Miodrag Milanovic <mmicko@gmail.com> | 2021-08-20 10:19:04 +0200 |
| commit | b59c42734837f6cb987e97d60e56e096c8d4d40a (patch) | |
| tree | 4c5df9bf6e2a88657fd0d873cad55134aed72b21 /Makefile | |
| parent | 75a4cdfc8afc10fed80e43fb1ba31c7edaf6e361 (diff) | |
| download | yosys-b59c42734837f6cb987e97d60e56e096c8d4d40a.tar.gz yosys-b59c42734837f6cb987e97d60e56e096c8d4d40a.tar.bz2 yosys-b59c42734837f6cb987e97d60e56e096c8d4d40a.zip | |
Make Verific extensions optional
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 7 |
1 files changed, 6 insertions, 1 deletions
@@ -18,6 +18,7 @@ ENABLE_READLINE := 1 ENABLE_EDITLINE := 0 ENABLE_GHDL := 0 ENABLE_VERIFIC := 0 +DISABLE_VERIFIC_EXTENSIONS := 0 ENABLE_COVER := 1 ENABLE_LIBYOSYS := 0 ENABLE_PROTOBUF := 0 @@ -498,7 +499,11 @@ endif ifeq ($(ENABLE_VERIFIC),1) VERIFIC_DIR ?= /usr/local/src/verific_lib -VERIFIC_COMPONENTS ?= verilog vhdl database util containers hier_tree extensions +VERIFIC_COMPONENTS ?= verilog vhdl database util containers hier_tree +ifneq ($(DISABLE_VERIFIC_EXTENSIONS),1) +VERIFIC_COMPONENTS += extensions +CXXFLAGS += -DYOSYSHQ_VERIFIC_EXTENSIONS +endif CXXFLAGS += $(patsubst %,-I$(VERIFIC_DIR)/%,$(VERIFIC_COMPONENTS)) -DYOSYS_ENABLE_VERIFIC ifeq ($(OS), Darwin) LDLIBS += $(patsubst %,$(VERIFIC_DIR)/%/*-mac.a,$(VERIFIC_COMPONENTS)) -lz |