diff options
| author | Eddie Hung <eddie@fpgeh.com> | 2020-05-11 10:30:20 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-05-11 10:31:02 -0700 |
| commit | b11cf67a8170ee830beedadc7156c4e83e4f1134 (patch) | |
| tree | 77992ff8a98d1d320519ade7f5106053283976a4 /Makefile | |
| parent | aafaeb66dfd839b8223059884d2741dadc9e2d92 (diff) | |
| download | yosys-b11cf67a8170ee830beedadc7156c4e83e4f1134.tar.gz yosys-b11cf67a8170ee830beedadc7156c4e83e4f1134.tar.bz2 yosys-b11cf67a8170ee830beedadc7156c4e83e4f1134.zip | |
Setup tests/verilog properly
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -780,6 +780,7 @@ test: $(TARGETS) $(EXTRA_TARGETS) +cd tests/arch/intel_alm && bash run-test.sh $(SEEDOPT) +cd tests/rpc && bash run-test.sh +cd tests/memfile && bash run-test.sh + +cd tests/verilog && bash run-test.sh @echo "" @echo " Passed \"make test\"." @echo "" |