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| author | Clifford Wolf <clifford@clifford.at> | 2014-03-09 20:40:04 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-03-09 20:40:04 +0100 |
| commit | 8d06f9f2fe19cc581e61ff66d0641bc03f815fb3 (patch) | |
| tree | 04770ed5e48a2038c0928ec255217dc403795f03 /Makefile | |
| parent | fcae92868de81de87079c1415d3d0123dce8d84c (diff) | |
| download | yosys-8d06f9f2fe19cc581e61ff66d0641bc03f815fb3.tar.gz yosys-8d06f9f2fe19cc581e61ff66d0641bc03f815fb3.tar.bz2 yosys-8d06f9f2fe19cc581e61ff66d0641bc03f815fb3.zip | |
Added "verific" command
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 14 |
1 files changed, 12 insertions, 2 deletions
@@ -8,6 +8,7 @@ ENABLE_TCL := 1 ENABLE_QT4 := 1 ENABLE_MINISAT := 1 ENABLE_ABC := 1 +ENABLE_VERIFIC := 0 # other configuration flags ENABLE_GPROF := 0 @@ -58,8 +59,10 @@ CXXFLAGS += -std=gnu++0x -march=native -O3 -DNDEBUG endif ifeq ($(ENABLE_TCL),1) -CXXFLAGS += -I/usr/include/tcl8.5 -DYOSYS_ENABLE_TCL -LDLIBS += -ltcl8.5 +TCL_VERSION ?= tcl8.5 +TCL_INCLUDE ?= /usr/include/$(TCL_VERSION) +CXXFLAGS += -I$(TCL_INCLUDE) -DYOSYS_ENABLE_TCL +LDLIBS += -l$(TCL_VERSION) endif ifeq ($(ENABLE_GPROF),1) @@ -75,6 +78,13 @@ ifeq ($(ENABLE_ABC),1) TARGETS += yosys-abc endif +ifeq ($(ENABLE_VERIFIC),1) +VERIFIC_DIR ?= /usr/local/src/verific_lib_eval +VERIFIC_COMPONENTS ?= verilog vhdl database util containers +CXXFLAGS += $(patsubst %,-I$(VERIFIC_DIR)/%,$(VERIFIC_COMPONENTS)) -D'VERIFIC_DIR="$(VERIFIC_DIR)"' +LDLIBS += $(patsubst %,$(VERIFIC_DIR)/%/*-linux.a,$(VERIFIC_COMPONENTS)) +endif + OBJS += kernel/driver.o kernel/register.o kernel/rtlil.o kernel/log.o kernel/calc.o OBJS += libs/bigint/BigIntegerAlgorithms.o libs/bigint/BigInteger.o libs/bigint/BigIntegerUtils.o |