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| author | Clifford Wolf <clifford@clifford.at> | 2014-07-24 19:03:57 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-24 19:03:57 +0200 |
| commit | 45b4154b3799178a432d1f14dcaf51787b86f35d (patch) | |
| tree | 488b298f5b715f49b954886d172d0aff0a3478c4 /Makefile | |
| parent | 34ea9e3f098925a7e107f2da265ff27b6b9985be (diff) | |
| download | yosys-45b4154b3799178a432d1f14dcaf51787b86f35d.tar.gz yosys-45b4154b3799178a432d1f14dcaf51787b86f35d.tar.bz2 yosys-45b4154b3799178a432d1f14dcaf51787b86f35d.zip | |
Added "make SMALL=1"
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 26 |
1 files changed, 26 insertions, 0 deletions
@@ -22,6 +22,7 @@ EXTRA_TARGETS = TARGETS = yosys yosys-config PRETTY = 1 +SMALL = 0 all: top-all @@ -124,6 +125,9 @@ OBJS += libs/bigint/BigIntegerAlgorithms.o libs/bigint/BigInteger.o libs/bigint/ OBJS += libs/bigint/BigUnsigned.o libs/bigint/BigUnsignedInABase.o OBJS += libs/sha1/sha1.o + +ifneq ($(SMALL),1) + OBJS += libs/subcircuit/subcircuit.o OBJS += libs/ezsat/ezsat.o @@ -139,6 +143,28 @@ include passes/*/Makefile.inc include backends/*/Makefile.inc include techlibs/*/Makefile.inc +else + +include frontends/verilog/Makefile.inc +include frontends/ilang/Makefile.inc +include frontends/ast/Makefile.inc + +OBJS += passes/hierarchy/hierarchy.o +OBJS += passes/cmds/select.o +OBJS += passes/cmds/show.o +OBJS += passes/cmds/stat.o +OBJS += passes/cmds/cover.o + +include passes/proc/Makefile.inc +include passes/opt/Makefile.inc +include passes/techmap/Makefile.inc +include passes/abc/Makefile.inc + +include backends/verilog/Makefile.inc +include backends/ilang/Makefile.inc + +endif + top-all: $(TARGETS) $(EXTRA_TARGETS) yosys: $(OBJS) |