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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-20 19:00:36 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-20 19:00:36 -0700 |
| commit | e612dade12b30bdee15b7dd2535af51e5ec1614d (patch) | |
| tree | e38be54476c557471cc8a30bc8c140d7c2797b3a /CHANGELOG | |
| parent | 014606affe3f1753ac16d2afd684967d72d83746 (diff) | |
| parent | 477e566e8d203ec7754c90fc845d7f3f759f2974 (diff) | |
| download | yosys-e612dade12b30bdee15b7dd2535af51e5ec1614d.tar.gz yosys-e612dade12b30bdee15b7dd2535af51e5ec1614d.tar.bz2 yosys-e612dade12b30bdee15b7dd2535af51e5ec1614d.zip | |
Merge remote-tracking branch 'origin/master' into xaig
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -21,7 +21,7 @@ Yosys 0.8 .. Yosys 0.8-dev - Added "synth_xilinx -abc9" (experimental) - Added "synth_ice40 -abc9" (experimental) - Added "synth -abc9" (experimental) - - "synth_xilinx" to now infer hard shift registers, using new "shregmap -tech xilinx" + - Extended "muxcover -mux{4,8,16}=<cost>" Yosys 0.7 .. Yosys 0.8 |