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| author | Miodrag Milanovic <mmicko@gmail.com> | 2022-12-05 17:11:03 +0100 |
|---|---|---|
| committer | Miodrag Milanovic <mmicko@gmail.com> | 2022-12-05 17:11:03 +0100 |
| commit | 313b7997b50f549794b507b4a44ccfb3ae8a2afc (patch) | |
| tree | 6d05bf9779a8400464977aa73e18471852761dbe /CHANGELOG | |
| parent | 2dac9be3cd2c402b74ce3e00920f0bcfa2d5239a (diff) | |
| download | yosys-313b7997b50f549794b507b4a44ccfb3ae8a2afc.tar.gz yosys-313b7997b50f549794b507b4a44ccfb3ae8a2afc.tar.bz2 yosys-313b7997b50f549794b507b4a44ccfb3ae8a2afc.zip | |
Release version 0.24
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 15 |
1 files changed, 14 insertions, 1 deletions
@@ -2,11 +2,24 @@ List of major changes and improvements between releases ======================================================= -Yosys 0.23 .. Yosys 0.23-dev +Yosys 0.23 .. Yosys 0.24 -------------------------- + * New commands and options + - Added option "-set-def-formal" to "sat" pass. + - Added option "-s" to "tee" command. * Verilog - Support for module-scoped identifiers referring to tasks and functions. + - Support for arrays with swapped ranges within structs. + + * Verific support + - Support for importing verilog configurations per name. + - "verific -set-XXXXX" commands are now able to set severity to all messages + of certain type (errors, warnings, infos and comments) + + * Various + - TCL shell support (use "yosys -C") + - Added FABulous eFPGA frontend Yosys 0.22 .. Yosys 0.23 -------------------------- |