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| author | Zachary Snow <zach@zachjs.com> | 2022-01-17 23:18:12 -0700 |
|---|---|---|
| committer | Zachary Snow <zachary.j.snow@gmail.com> | 2022-02-11 22:54:55 +0100 |
| commit | 15eb66b99dc40901895d4e4a512d3c49dde3a9b4 (patch) | |
| tree | e52bc5aacebb4c4d755a7c6646db40c390f2a6a5 /CHANGELOG | |
| parent | 90bb47d18140e381e65bd2b51fd793a0692b56a0 (diff) | |
| download | yosys-15eb66b99dc40901895d4e4a512d3c49dde3a9b4.tar.gz yosys-15eb66b99dc40901895d4e4a512d3c49dde3a9b4.tar.bz2 yosys-15eb66b99dc40901895d4e4a512d3c49dde3a9b4.zip | |
verilog: fix dynamic dynamic range asgn elab
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -8,6 +8,8 @@ Yosys 0.14 .. Yosys 0.14-dev * Verilog - Fixed evaluation of constant functions with variables or arguments with reversed dimensions + - Fixed elaboration of dynamic range assignments where the vector is + reversed or is not zero-indexed Yosys 0.13 .. Yosys 0.14 -------------------------- |