diff options
author | Ahmed Irfan <ahmedirfan1983@gmail.com> | 2014-01-03 10:54:54 +0100 |
---|---|---|
committer | Ahmed Irfan <ahmedirfan1983@gmail.com> | 2014-01-03 10:54:54 +0100 |
commit | 06482c046bcab4e2b9603f8954ce0f2fd501a73b (patch) | |
tree | d160ad05402768e4f468ff0685593b81658e6a5a /CHANGELOG | |
parent | 5da334fc2efd66c8a5efde925bb18212c34d0cef (diff) | |
parent | fb2bf934dc6d2c969906b350c9a1b09a972bfdd7 (diff) | |
download | yosys-06482c046bcab4e2b9603f8954ce0f2fd501a73b.tar.gz yosys-06482c046bcab4e2b9603f8954ce0f2fd501a73b.tar.bz2 yosys-06482c046bcab4e2b9603f8954ce0f2fd501a73b.zip |
Merge branch 'master' of https://github.com/cliffordwolf/yosys into btor
Diffstat (limited to 'CHANGELOG')
-rw-r--r-- | CHANGELOG | 38 |
1 files changed, 36 insertions, 2 deletions
@@ -6,6 +6,40 @@ List of incompatible changes and major milestones between releases Yosys 0.1.0 .. Yoys 0.1.0+ -------------------------- - - Tighter integration of ABC build with Yosys build. The make - targets 'make abc' and 'make install-abc' are now obsolete. + * Improvements in Verilog frontend: + - Added support for local registers in named blocks + - Added support for "case" in "generate" blocks + - Added support for $clog2 system function + - Added preprocessor support for macro arguments + - Added preprocessor support for `elsif statement + + * Improvements in technology mapping: + - The "dfflibmap" command now strongly prefers solutions with + no inverters in clock paths + - The "dfflibmap" command now prefers cells with smaller area + + * Integration with ABC: + - Updated ABC to hg rev 57517e81666b + - Tighter integration of ABC build with Yosys build. The make + targets 'make abc' and 'make install-abc' are now obsolete. + - Added support for passing FFs from one clock domain through ABC + - Now always use BLIF as exchange format with ABC + + * Improvements to "eval" and "sat" framework: + - Added support for "0" and "~0" in right-hand side -set expressions + - Added "eval -set-undef" and "eval -table" + - Added "sat -set-init" support for sequential problems + - Added undef support to SAT solver, incl. various new "sat" options + - Added correct support for === and !== for "eval" and "sat" + + * Added "abbreviated IDs": + - Now $<something>$foo can be abbriviated as $foo. + - Usually this last part is a unique id (from RTLIL::autoidx) + - This abbreviated IDs are now also used in "show" output + + * Various other changes to commands and options: + - The "ls" command now supports wildcards + - Added "show -pause" and "show -format dot" + - Added "dump -m" and "dump -n" + - Added "history" command |