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authorEddie Hung <eddie@fpgeh.com>2019-05-23 11:32:28 -0700
committerEddie Hung <eddie@fpgeh.com>2019-05-23 11:32:28 -0700
commit99a3fee8f4a0f89f865ccf5292d5e70d59febd9f (patch)
treeabca4263ba6df2c3d7d749ee4d566fb56c374263 /.travis
parentca4694735455512162da1d4a24429ecf350a8abe (diff)
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Add "min bits" and "min wports" to xilinx dram rules
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