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authorJannis Harder <me@jix.one>2022-05-09 16:07:39 +0200
committerGitHub <noreply@github.com>2022-05-09 16:07:39 +0200
commit5ca2ee0c3114464c91743b73efd7c4c4f15fb0dd (patch)
treefa7a31d02a6de07779a4f7b7934fb662c5efc06d /.dockerignore
parentd562bfd165b3c107abf717d2661c44aa2b7740fb (diff)
parent96f64f4788ca64adde55421a6abadefd182d9a1a (diff)
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Merge pull request #3297 from jix/sva_nested_clk_else
verific: Fix conditions of SVAs with explicit clocks within procedures
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