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| author | David Shah <dave@ds0.me> | 2019-06-26 11:39:44 +0100 |
|---|---|---|
| committer | David Shah <dave@ds0.me> | 2019-06-26 11:39:44 +0100 |
| commit | 0dd850e6552a74430559ed63c3a9a67aa1c84512 (patch) | |
| tree | 7aa49a38e06a3dba641096066c3fc7f06a224217 /.clang-format | |
| parent | 5db96b8aec7be2fb864d0f41ef21bb5168fa6b5c (diff) | |
| download | yosys-0dd850e6552a74430559ed63c3a9a67aa1c84512.tar.gz yosys-0dd850e6552a74430559ed63c3a9a67aa1c84512.tar.bz2 yosys-0dd850e6552a74430559ed63c3a9a67aa1c84512.zip | |
abc9: Add wire delays to synth_ice40
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to '.clang-format')
0 files changed, 0 insertions, 0 deletions