1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
|
/*
* nextpnr -- Next Generation Place and Route
*
* Copyright (C) 2019 gatecat <gatecat@ds0.me>
* Copyright (C) 2020 Pepijn de Vos <pepijn@symbioticeda.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "cells.h"
#include <iostream>
#include "design_utils.h"
#include "log.h"
#include "util.h"
NEXTPNR_NAMESPACE_BEGIN
std::unique_ptr<CellInfo> create_generic_cell(Context *ctx, IdString type, std::string name)
{
static int auto_idx = 0;
IdString name_id =
name.empty() ? ctx->id("$nextpnr_" + type.str(ctx) + "_" + std::to_string(auto_idx++)) : ctx->id(name);
auto new_cell = std::make_unique<CellInfo>(ctx, name_id, type);
if (type == id_SLICE) {
new_cell->params[id_INIT] = 0;
new_cell->params[id_FF_USED] = 0;
new_cell->params[id_FF_TYPE] = id_DFF.str(ctx);
IdString names[4] = {id_A, id_B, id_C, id_D};
for (int i = 0; i < 4; i++) {
new_cell->addInput(names[i]);
}
new_cell->addInput(id_CLK);
new_cell->addOutput(id_F);
new_cell->addOutput(id_Q);
new_cell->addInput(id_CE);
new_cell->addInput(id_LSR);
} else if (type == id_GW_MUX2_LUT5 || type == id_GW_MUX2_LUT6 || type == id_GW_MUX2_LUT7 ||
type == id_GW_MUX2_LUT7 || type == id_GW_MUX2_LUT8) {
new_cell->addInput(id_I0);
new_cell->addInput(id_I1);
new_cell->addInput(id_SEL);
new_cell->addOutput(id_OF);
} else if (type == id_IOB || type == id_IOBS) {
new_cell->params[id_INPUT_USED] = 0;
new_cell->params[id_OUTPUT_USED] = 0;
new_cell->params[id_ENABLE_USED] = 0;
new_cell->addInout(id_PAD);
new_cell->addInput(id_I);
new_cell->addInput(id_OEN);
new_cell->addOutput(id_O);
} else {
log_error("unable to create generic cell of type %s\n", type.c_str(ctx));
}
return new_cell;
}
void lut_to_lc(const Context *ctx, CellInfo *lut, CellInfo *lc, bool no_dff)
{
lc->params[id_INIT] = lut->params[id_INIT];
lc->cluster = lut->cluster;
lc->constr_x = lut->constr_x;
lc->constr_y = lut->constr_y;
lc->constr_z = lut->constr_z;
// add itself to the cluster root children list
if (lc->cluster != ClusterId()) {
CellInfo *cluster_root = ctx->cells.at(lc->cluster).get();
lc->constr_x += cluster_root->constr_x;
lc->constr_y += cluster_root->constr_y;
lc->constr_z += cluster_root->constr_z;
if (cluster_root->cluster != cluster_root->name) {
lc->cluster = cluster_root->cluster;
cluster_root = ctx->cells.at(cluster_root->cluster).get();
}
cluster_root->constr_children.push_back(lc);
}
IdString sim_names[4] = {id_I0, id_I1, id_I2, id_I3};
IdString wire_names[4] = {id_A, id_B, id_C, id_D};
for (int i = 0; i < 4; i++) {
replace_port(lut, sim_names[i], lc, wire_names[i]);
}
if (no_dff) {
lc->params[id_FF_USED] = 0;
replace_port(lut, id_F, lc, id_F);
}
}
void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_lut)
{
lc->params[id_FF_USED] = 1;
lc->params[id_FF_TYPE] = dff->type.str(ctx);
replace_port(dff, id_CLK, lc, id_CLK);
replace_port(dff, id_CE, lc, id_CE);
replace_port(dff, id_SET, lc, id_LSR);
replace_port(dff, id_RESET, lc, id_LSR);
replace_port(dff, id_CLEAR, lc, id_LSR);
replace_port(dff, id_PRESET, lc, id_LSR);
if (pass_thru_lut) {
// Fill LUT with alternating 10
const int init_size = 1 << 4;
std::string init;
init.reserve(init_size);
for (int i = 0; i < init_size; i += 2)
init.append("10");
lc->params[id_INIT] = Property::from_string(init);
replace_port(dff, id_D, lc, id_A);
}
replace_port(dff, id_Q, lc, id_Q);
}
void gwio_to_iob(Context *ctx, CellInfo *nxio, CellInfo *iob, pool<IdString> &todelete_cells)
{
if (nxio->type == id_IBUF) {
if (iob->type == id_IOBS) {
// VCC -> OEN
connect_port(ctx, ctx->nets[ctx->id("$PACKER_VCC_NET")].get(), iob, id_OEN);
}
iob->params[id_INPUT_USED] = 1;
replace_port(nxio, id_O, iob, id_O);
} else if (nxio->type == id_OBUF) {
if (iob->type == id_IOBS) {
// VSS -> OEN
connect_port(ctx, ctx->nets[ctx->id("$PACKER_GND_NET")].get(), iob, id_OEN);
}
iob->params[id_OUTPUT_USED] = 1;
replace_port(nxio, id_I, iob, id_I);
} else if (nxio->type == id_TBUF) {
iob->params[id_ENABLE_USED] = 1;
iob->params[id_OUTPUT_USED] = 1;
replace_port(nxio, id_I, iob, id_I);
replace_port(nxio, id_OEN, iob, id_OEN);
} else if (nxio->type == id_IOBUF) {
iob->params[id_ENABLE_USED] = 1;
iob->params[id_INPUT_USED] = 1;
iob->params[id_OUTPUT_USED] = 1;
replace_port(nxio, id_I, iob, id_I);
replace_port(nxio, id_O, iob, id_O);
replace_port(nxio, id_OEN, iob, id_OEN);
} else {
NPNR_ASSERT(false);
}
}
NEXTPNR_NAMESPACE_END
|
