Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Add getBelHidden and add some missing "override" statements. | Keith Rothman | 2021-02-11 | 1 | -1/+1 |
| | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
* | Add BaseArchRanges for default ArchRanges types | gatecat | 2021-02-09 | 1 | -16/+1 |
| | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Merge pull request #568 from YosysHQ/dave/arch-override | gatecat | 2021-02-08 | 5 | -303/+106 |
|\ | | | | | Create a new BaseArch that formally specifies the Arch API and provides some base implementations | ||||
| * | Use 'T' postfix to disambiguate LHS and RHS of using | D. Shah | 2021-02-08 | 1 | -21/+21 |
| | | | | | | | | | | | | | | Arches might otherwise have range types named ambigiously with the entry in ArchRanges. Signed-off-by: D. Shah <dave@ds0.me> | ||||
| * | Add archArgs and archArgsToId to Arch API | D. Shah | 2021-02-05 | 1 | -2/+3 |
| | | | | | | | | Signed-off-by: D. Shah <dave@ds0.me> | ||||
| * | nexus: Switch to BaseArch | D. Shah | 2021-02-05 | 5 | -301/+103 |
| | | | | | | | | Signed-off-by: D. Shah <dave@ds0.me> | ||||
* | | Use RelSlice::ssize instead of cast-to-int throughout | D. Shah | 2021-02-08 | 1 | -10/+10 |
|/ | | | | Signed-off-by: D. Shah <dave@ds0.me> | ||||
* | Mark IdString and IdStringList single argument constructors explicit. | Keith Rothman | 2021-02-04 | 5 | -16/+16 |
| | | | | | | | | | Single argument constructors will silently convert to that type. This is typically not the right thing to do. For example, the nexus and ice40 arch_pybindings.h files were incorrectly parsing bel name strings, etc. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
* | nexus: Implement IdStringList for all arch object names | D. Shah | 2021-02-02 | 3 | -59/+56 |
| | | | | Signed-off-by: D. Shah <dave@ds0.me> | ||||
* | arch: Add getNameDelimiter API for string lists | D. Shah | 2021-02-02 | 1 | -0/+1 |
| | | | | Signed-off-by: D. Shah <dave@ds0.me> | ||||
* | Run "make clangformat". | Keith Rothman | 2021-02-02 | 4 | -27/+21 |
| | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
* | Add pybindings for new APIs. | Keith Rothman | 2021-02-02 | 2 | -0/+15 |
| | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
* | Rename Partition -> BelBucket. | Keith Rothman | 2021-02-02 | 3 | -29/+29 |
| | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
* | Add Partition APIs to ice40, nexus, gowin archs. | Keith Rothman | 2021-02-02 | 3 | -2/+80 |
| | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
* | Initial refactoring of placer API. | Keith Rothman | 2021-02-02 | 1 | -0/+5 |
| | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
* | Seperate PipRange types in pybindings_shared. | Keith Rothman | 2021-02-01 | 2 | -2/+2 |
| | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
* | cleanup: Spelling fixes | D. Shah | 2021-01-28 | 1 | -1/+1 |
| | | | | Signed-off-by: D. Shah <dave@ds0.me> | ||||
* | cleanup: Fix compiler warnings | D. Shah | 2021-01-28 | 1 | -2/+1 |
| | | | | Signed-off-by: D. Shah <dave@ds0.me> | ||||
* | Make RelSlice uncopyable | D. Shah | 2021-01-27 | 1 | -1/+1 |
| | | | | Signed-off-by: D. Shah <dave@ds0.me> | ||||
* | Move RelPtr/RelSlice out of arches into common | D. Shah | 2021-01-27 | 1 | -39/+1 |
| | | | | | | | The bba approach seems widely used enough that it's reasonable for this to become part of common code. Signed-off-by: D. Shah <dave@ds0.me> | ||||
* | nexus: Switch from RelPtr to RelSlice | D. Shah | 2021-01-27 | 4 | -127/+113 |
| | | | | | | | | | | This replaces RelPtrs and a separate length field with a Rust-style slice containing both a pointer and a length; with bounds checking always enforced. Thus iterating over these structures is both cleaner and safer. Signed-off-by: D. Shah <dave@ds0.me> | ||||
* | nexus: Add MULTADDSUB9X9WIDE support | David Shah | 2020-12-08 | 2 | -28/+71 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Fix LRAM pin types | David Shah | 2020-12-07 | 2 | -10/+11 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add support for initialised LRAM | David Shah | 2020-12-07 | 4 | -12/+50 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add basic LRAM support (no init) | David Shah | 2020-12-02 | 6 | -4/+116 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add PLL support | David Shah | 2020-12-02 | 4 | -3/+213 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add support for deriving timing constraints in packer | David Shah | 2020-12-02 | 1 | -0/+96 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus/pdc: Parse simple clock constraints | David Shah | 2020-12-02 | 1 | -0/+61 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Fix db integrity check | David Shah | 2020-11-30 | 2 | -18/+7 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add post-place LUTFF optimisation | David Shah | 2020-11-30 | 4 | -19/+200 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Improve error handling in global router | David Shah | 2020-11-30 | 1 | -0/+8 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Preliminary integration of DSP timing data | David Shah | 2020-11-30 | 3 | -4/+111 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Tweak heuristics to improve routeability | David Shah | 2020-11-30 | 1 | -2/+2 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Clocked MULTADDSUB36X36 fix | David Shah | 2020-11-30 | 1 | -0/+2 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add MULTADDSUB36X36 | David Shah | 2020-11-30 | 1 | -4/+21 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add MULTADDSUB18X18 support | David Shah | 2020-11-30 | 2 | -17/+78 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: ACC54 definitions | David Shah | 2020-11-30 | 3 | -0/+77 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add DSP pre-adder support | David Shah | 2020-11-30 | 2 | -2/+23 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Fix DSP signed ports | David Shah | 2020-11-30 | 1 | -2/+2 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Larger DSP tweaks | David Shah | 2020-11-30 | 2 | -9/+15 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Fix slow routing around DSPs | David Shah | 2020-11-30 | 2 | -0/+28 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Fix validity checking when DSPs are used | David Shah | 2020-11-30 | 2 | -3/+10 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Refactor DSP macro splitting to make it more generic | David Shah | 2020-11-30 | 3 | -29/+139 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add support for clocked MULT9X9s | David Shah | 2020-11-30 | 2 | -0/+45 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Support for unclocked 9x9 multiplies | David Shah | 2020-11-30 | 3 | -13/+96 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: More DSP primitive config | David Shah | 2020-11-30 | 3 | -1/+67 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Miscellaneous DSP infrastructure | David Shah | 2020-11-30 | 2 | -0/+125 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add some infrastructure for DSP packing | David Shah | 2020-11-30 | 1 | -5/+135 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Tweak delay heuristics | David Shah | 2020-11-30 | 1 | -2/+4 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add EBR timing analysis | David Shah | 2020-11-30 | 2 | -0/+38 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> |