| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | machxo2: Don't write out config bits for cells without location info. | William D. Jones | 2021-02-12 | 1 | -1/+2 |
| * | machxo2: Special-case left and right I/O wire names in ASCII generation. | William D. Jones | 2021-02-12 | 1 | -1/+35 |
| * | machxo2: clang format. | William D. Jones | 2021-02-12 | 1 | -23/+28 |
| * | machxo2: Add bitstream generation for OSCH. | William D. Jones | 2021-02-12 | 1 | -0/+4 |
| * | machxo2: Add basic bitstream generation for PIC tiles and I/O. | William D. Jones | 2021-02-12 | 1 | -0/+26 |
| * | machxo2: Add REGMODE to bitstream output. | William D. Jones | 2021-02-12 | 1 | -0/+1 |
| * | machxo2: Checkpoint commit for slice bitstream generation. | William D. Jones | 2021-02-12 | 1 | -1/+77 |
| * | machxo2: Write out pips to bitstream. | William D. Jones | 2021-02-12 | 1 | -0/+41 |
| * | machxo2: Emit empty bitstream file. | William D. Jones | 2021-02-12 | 1 | -0/+37 |
| * | machxo2: Add stub bitstream writer plus support files. | William D. Jones | 2021-02-12 | 1 | -0/+32 |
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index : iCE40/nextpnr | |
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