aboutsummaryrefslogtreecommitdiffstats
path: root/ice40/chipdb.py
Commit message (Collapse)AuthorAgeFilesLines
* Refactore ice40 chipdb to use a super-large C-string as output formatClifford Wolf2018-06-171-18/+76
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Minor chipdb.py improvementClifford Wolf2018-06-171-2/+17
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Move top-level ChipInfoPOD into ice40 chipdb blobClifford Wolf2018-06-171-19/+32
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Move PackageInfoPOD to ice40 chipdb blobClifford Wolf2018-06-171-6/+8
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Move TileType array to ice40 chipdb blobClifford Wolf2018-06-171-6/+13
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Move BitstreamInfoPOD to ice40 chipdb blobClifford Wolf2018-06-171-8/+14
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Move IerenInfoPOD to ice40 chipdb blobClifford Wolf2018-06-171-12/+11
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Move TileInfoPOD to chipdb blobClifford Wolf2018-06-171-6/+14
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Move SwitchInfoPOD to chipdb blobClifford Wolf2018-06-171-14/+24
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Move PipInfoPOD into ChipDB binary blobClifford Wolf2018-06-171-6/+28
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Move WireInfoPOD into ChipDB binary blobClifford Wolf2018-06-171-26/+48
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Minor refactoring of BinaryBlobAssembler, fix alignmentsClifford Wolf2018-06-171-67/+123
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Progress with chipdb refactoringClifford Wolf2018-06-161-10/+22
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Progress with chipdb refactoringClifford Wolf2018-06-161-39/+34
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Progress with chipdb refactoringClifford Wolf2018-06-161-9/+150
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Some refactoring of Chip API (prep for chipdb refactoring)Clifford Wolf2018-06-161-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Drastically reduce number of linker symbols in chipdbClifford Wolf2018-06-131-18/+40
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add missing iCE40 global buffer belsClifford Wolf2018-06-131-0/+18
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add hierarchy to bel/wire/pip namesClifford Wolf2018-06-131-6/+6
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* ice40: Update examples to use packer/pcfDavid Shah2018-06-131-2/+3
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Add package pins to databaseDavid Shah2018-06-131-2/+36
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Add nextpnr namespaceClifford Wolf2018-06-121-1/+8
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "nextpnr.h"Clifford Wolf2018-06-111-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Improving 5k supportDavid Shah2018-06-101-2/+11
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Fix iCE40 routing graphClifford Wolf2018-06-101-22/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add support for iCE40 global buffers (currently only for 1k devices)Clifford Wolf2018-06-101-0/+20
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Debugging on icebreakerDavid Shah2018-06-101-2/+2
|
* Fix ice40 pip/switch locked performance issueClifford Wolf2018-06-101-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* ice40: Add IO config to bitstreamDavid Shah2018-06-101-2/+17
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Adding non-routing config bits to databaseDavid Shah2018-06-101-2/+55
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Add switch data to databaseDavid Shah2018-06-101-6/+47
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Renamed LOC attribute to BEL, fix ice40 IO bel namesClifford Wolf2018-06-091-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Getting rid of .nil() methods, compare with zero- and default-constructed ↵Clifford Wolf2018-06-091-1/+1
| | | | | | objects instead Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add very basic routerClifford Wolf2018-06-091-6/+28
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add ice40 geometry informationClifford Wolf2018-06-061-8/+31
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Refactor Chip API and iCE40 databaseClifford Wolf2018-06-061-35/+54
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add iCE40 blockram belsClifford Wolf2018-06-041-0/+31
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add iCE40 SB_IO belsClifford Wolf2018-06-031-0/+31
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add ice40 ICESTORM_LC belsClifford Wolf2018-06-021-3/+111
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Progress in ice40 chipdbClifford Wolf2018-05-261-2/+2
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Start work on iCE40 chipdbClifford Wolf2018-05-261-0/+114
Signed-off-by: Clifford Wolf <clifford@clifford.at>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-06 06:31:13 +0000