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fpga_interchange
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Author
Age
Files
Lines
*
interchange: Base on ArchAPI
D. Shah
2021-02-08
2
-106
/
+135
*
Add RelSlice::ssize and use it when comparing with signed ints.
Keith Rothman
2021-02-05
2
-27
/
+28
*
Move all string data into BBA file.
Keith Rothman
2021-02-05
4
-48901
/
+15
*
Use RelSlice instead of RelPtr in cases where sizes are present.
Keith Rothman
2021-02-04
2
-97
/
+67
*
Update APIs to conform to style guide.
Keith Rothman
2021-02-04
5
-67
/
+48939
*
Remove unused method getReservedWireNet.
Keith Rothman
2021-02-04
1
-7
/
+0
*
Update copywrite headers.
Keith Rothman
2021-02-04
6
-4
/
+10
*
Correct some typos.
Keith Rothman
2021-02-04
1
-4
/
+4
*
Fix warnings with signed/unsigned.
Keith Rothman
2021-02-04
1
-1
/
+1
*
Fix fpga_interchange/README.md duplicate patch statement.
Keith Rothman
2021-02-04
1
-8
/
+0
*
Fix URLs in Markdown.
Keith Rothman
2021-02-04
1
-2
/
+2
*
Add empty constids.inc for build.
Keith Rothman
2021-02-04
1
-0
/
+0
*
Run "make clangformat".
Keith Rothman
2021-02-04
4
-148
/
+100
*
Add README about initial state of FPGA interchange implementation.
Keith Rothman
2021-02-04
1
-0
/
+170
*
Update FPGA interchange to use IdStringList.
Keith Rothman
2021-02-04
2
-132
/
+137
*
Start adding data for placement constraint solving.
Keith Rothman
2021-02-04
2
-50
/
+43
*
Debug BEL bucket data.
Keith Rothman
2021-02-04
1
-11
/
+14
*
Add initial updates to FPGA interchange arch for BEL buckets.
Keith Rothman
2021-02-04
5
-0
/
+247
*
Address review comments.
Keith Rothman
2021-02-04
3
-95
/
+6
*
Fix BBA import bugs.
Keith Rothman
2021-02-04
2
-69
/
+201
*
Assorted fixes to new FPGA interchange based arch.
Keith Rothman
2021-02-04
3
-5
/
+13
*
Initial compiling version.
Keith Rothman
2021-02-04
2
-16
/
+25
*
Initial FPGA interchange (which is just a cut-down xilinx arch).
Keith Rothman
2021-02-04
9
-0
/
+2102