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* ecp5: DELAY fixesDavid Shah2019-02-251-11/+10
* ecp5: Improve packing densityDavid Shah2019-02-251-0/+58
* ecp5: Add criticality-based LUT permutationDavid Shah2019-02-251-0/+1
* ecp5: Speed up timing analysisDavid Shah2019-02-251-0/+3
* ecp5: DELAYF/G fixesDavid Shah2019-02-241-2/+2
* ecp5: Connect unused DQSBUF inputs to GNDDavid Shah2019-02-241-14/+30
* ecp5: Compute derived constraints iterativelyDavid Shah2019-02-241-52/+79
* ecp5: Derived constraint support for PLLs, clock dividers and oscillatorsDavid Shah2019-02-241-0/+115
* ecp5: Fixes for litedramDavid Shah2019-02-241-0/+5
* ecp5: Add DELAYF/DELAYG supportDavid Shah2019-02-241-1/+122
* ecp5: Add DDRDLLA supportDavid Shah2019-02-241-0/+30
* ecp5: Add ECLKSYNCB supportDavid Shah2019-02-241-2/+23
* ecp5: Add TSHX2DQSA supportDavid Shah2019-02-241-4/+5
* ecp5: Add TSHX2DQA supportDavid Shah2019-02-241-1/+30
* ecp5: Add IDDRX2DQA supportDavid Shah2019-02-241-0/+30
* ecp5: Add ODDRX2DQSB suppportDavid Shah2019-02-241-4/+4
* ecp5: Add ODDRX2DQA supportDavid Shah2019-02-241-3/+36
* ecp5: Helper functions and bitstream for DQSDavid Shah2019-02-241-0/+33
* ecp5: Constraint checker and placer for DQSBUFMDavid Shah2019-02-241-1/+57
* ecp5: Add OSHX2A supportDavid Shah2019-02-241-0/+26
* ecp5: Add IDDRX2F supportDavid Shah2019-02-241-2/+25
* ecp5: Packing of ODDRX2FDavid Shah2019-02-241-5/+116
* ecp5: Helper functions for DQS and ECLKDavid Shah2019-02-241-1/+107
* ecp5: Check for incorrect use of TRELLIS_IO 'B' pinDavid Shah2018-12-251-0/+9
* ecp5: Fix ODDR when used with manually instantiated TRELLIS_IODavid Shah2018-12-191-0/+4
* ecp5: Fix IOLOGIC ports at the same constant valueDavid Shah2018-12-151-2/+12
* ecp5: Add IOLOGIC timing and bitstream; ODDR workingDavid Shah2018-12-141-24/+31
* ecp5: Add ODDR packingDavid Shah2018-12-141-0/+19
* ecp5: Adding IOLOGIC packingDavid Shah2018-12-141-0/+98
* ecp5: Pre-place PLLs and use dedicated routes into globalsDavid Shah2018-11-301-0/+55
* ecp5: Add support for LUT7 muxDavid Shah2018-11-181-6/+116
* ecp5: More optimal LUT6 placementDavid Shah2018-11-161-1/+4
* ecp5: Adding mux support up to LUT6David Shah2018-11-161-4/+46
* ecp5: Support LOC attribute on DCUsDavid Shah2018-11-151-1/+25
* ecp5: EXTREFB fixesDavid Shah2018-11-151-1/+3
* ecp5: clangformatDavid Shah2018-11-151-13/+14
* ecp5: Trim IO connected to top level portsDavid Shah2018-11-151-15/+73
* ecp5: Adding ancillary DCU belsDavid Shah2018-11-151-0/+32
* ecp5: remove debug and clangformatDavid Shah2018-11-151-1/+2
* ecp5: Working on DCUDavid Shah2018-11-151-0/+22
* ecp5: Separate global promotion and routingDavid Shah2018-10-311-0/+2
* ecp5: Add IO buffer insertionDavid Shah2018-10-311-2/+8
* ecp5: DSP fixesDavid Shah2018-10-221-1/+3
* ecp5: Working on DSPsDavid Shah2018-10-221-1/+52
* ecp5: BRAM improvements with constant/inverted inputsDavid Shah2018-10-061-0/+17
* ecp5: Fixing EBR constant tie-offsDavid Shah2018-10-051-0/+49
* ecp5: Negative clock support, general slice improvementsDavid Shah2018-10-021-2/+16
* ecp5: Small DRAM routing fixesDavid Shah2018-10-011-6/+10
* clangformatDavid Shah2018-10-011-2/+2
* ecp5: Fix packing of FFs into carry/DRAM slicesDavid Shah2018-10-011-4/+12
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