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* ecp5: Add DCSC supportgatecat2021-07-061-0/+5
* Fixing old emails and names in copyrightsgatecat2021-06-121-1/+1
* Using hashlib in archesgatecat2021-06-021-2/+2
* Use hashlib for core netlist structuresgatecat2021-06-021-2/+1
* ecp5: Use new cluster APIgatecat2021-05-061-1/+1
* Only set CIBOUT_BYP on MULTs that are not feeding an ALU.Adam Greig2021-04-291-1/+1
* Add ALU54B.REG_OPCODEOP1_1_CLK parameter supportAdam Greig2021-04-291-0/+2
* ecp5: Use snake case for arch-specific functionsD. Shah2021-02-031-162/+162
* ecp5: Implement IdStringList for all arch object namesD. Shah2021-02-021-10/+5
* cleanup: Spelling fixesD. Shah2021-01-281-1/+1
* ecp5: Fix bottom clock tile renaming for tilegroupsD. Shah2021-01-251-0/+8
* clangformatDavid Shah2020-12-301-1/+2
* ecp5: Improve pseudo-diff IO error handlingDavid Shah2020-12-271-2/+4
* clangformatDavid Shah2020-11-141-4/+4
* ecp5: Fix handling of CLK/LSR wire attached settingsDavid Shah2020-11-051-2/+4
* ecp5: Add support for setting PIO clampDavid Shah2020-09-261-0/+3
* ecp5: Add SYSCONFIG settings to bitstreamDavid Shah2020-07-121-2/+31
* clangformatDavid Shah2020-05-161-1/+2
* ecp5: Allow setting drive strength for LVCMOS33D IOsMike Walters2020-05-121-0/+19
* ecp5: Fix CSDECODE bitgenDavid Shah2020-04-151-0/+3
* ecp5: Fix routing bitgen for non-SERDES 'VCIB' tilesDavid Shah2020-04-101-3/+12
* ecp5: Make hysteresis default-on for LVCMOS33 bidir as well as inputDavid Shah2020-04-091-9/+7
* Handle OPENDRAIN attribute.Gary Wong2020-04-031-0/+3
* Enum/int compatibility for EHXPLLL parametersMartin2020-04-021-2/+7
* ecp5: Proper support for '12k' deviceDavid Shah2020-03-131-4/+8
* ecp5: Fix differential inputsDavid Shah2020-03-081-1/+6
* ecp5: Add SPICB0 IO supportDavid Shah2020-01-201-2/+2
* ecp5: Add support for top pseudo diff outputsDavid Shah2020-01-151-12/+35
* ecp5: Add support for flipflops with preloadDavid Shah2019-12-071-0/+4
* ecp5: Fix 25k DDRDLLA bitstream genDavid Shah2019-11-291-2/+3
* ecp5: Fix dynamic DELAYF controlDavid Shah2019-11-181-0/+3
* ecp5: Allow setting drive strength for 3V3 IOsDavid Shah2019-10-261-0/+10
* ecp5: Add support for IO registersDavid Shah2019-10-091-0/+6
* ecp5: Preparations for new IO belsDavid Shah2019-10-091-0/+7
* ecp5: Adding support for 36-bit wide PDP RAMsDavid Shah2019-10-011-15/+22
* ecp5: Add support for clock gating with DCCADavid Shah2019-08-311-1/+29
* ecp5: Add full part name to bitstream headerDavid Shah2019-08-271-0/+2
* ecp5: Add GSR/SGSR supportDavid Shah2019-08-271-1/+1
* ecp5: Add --out-of-context for building hard macrosDavid Shah2019-08-071-6/+4
* ecp5: New Property interfaceDavid Shah2019-08-051-56/+75
* ecp5: Improve error message for bad chars in BRAM init stringsDavid Shah2019-06-081-7/+12
* ecp5: Derived constraint support for PLLs, clock dividers and oscillatorsDavid Shah2019-02-241-3/+4
* ecp5: Fixes for litedramDavid Shah2019-02-241-8/+12
* ecp5: Add DIFFRESISTOR supportDavid Shah2019-02-241-0/+2
* ecp5: Add support for referenced inputsDavid Shah2019-02-241-5/+58
* ecp5: Add DELAYF/DELAYG supportDavid Shah2019-02-241-12/+16
* ecp5: Add TERMINATION supportDavid Shah2019-02-241-0/+16
* ecp5: Add DDRDLLA supportDavid Shah2019-02-241-0/+12
* ecp5: Add ECLKSYNCB supportDavid Shah2019-02-241-0/+7
* ecp5: Helper functions and bitstream for DQSDavid Shah2019-02-241-0/+30
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