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* placer: only lock/unlock at beginning, yield elsewhereSergiusz Bazanski2018-07-261-7/+4
* gui: implement basic cursor pickingSergiusz Bazanski2018-07-261-0/+5
* common: rename GraphicElement::{style,type} enums, add _MAX membersSergiusz Bazanski2018-07-261-12/+16
* clangformat and GraphicElement::style commentsClifford Wolf2018-07-261-4/+4
* Fix router1 locking in NDEBUG buildsClifford Wolf2018-07-261-2/+2
* clangformatDavid Shah2018-07-251-4/+4
* Fix BaseCtx::unlock()Clifford Wolf2018-07-251-1/+1
* Merge branch 'bba' into 'master'Clifford Wolf2018-07-251-8/+8
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| * noreturn have to be void, so there is no UBMiodrag Milanovic2018-07-251-4/+4
| * Make thread check portableMiodrag Milanovic2018-07-251-4/+4
* | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/pll-padsSergiusz Bazanski2018-07-251-0/+10
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| * \ Merge branch 'placeconstr2'Clifford Wolf2018-07-241-0/+10
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| | * Typo fixClifford Wolf2018-07-241-1/+1
| | * Add CellInfo data for placement constraintsClifford Wolf2018-07-241-0/+10
* | | ice40: support PLL40_*_PAD, fix pass-through LUT for LOCKSergiusz Bazanski2018-07-251-1/+7
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* / common: Remove use of deprecated APIsDavid Shah2018-07-243-29/+24
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* Add G_ARROW (for now same look as G_LINE)Clifford Wolf2018-07-241-0/+1
* timing: Model clock to Q timesDavid Shah2018-07-241-0/+3
* Add Context::archcheck() and "nextpnr-ice40 --test"Clifford Wolf2018-07-233-5/+148
* clangformatClifford Wolf2018-07-231-18/+22
* Add fallback to estimateDelay() in getNetinfoRouteDelay()Clifford Wolf2018-07-231-1/+6
* Rename getWireBelPin to getBelPinWireClifford Wolf2018-07-222-4/+4
* Move common patterns from router1 to Context APIClifford Wolf2018-07-223-150/+124
* clangformatClifford Wolf2018-07-221-30/+25
* Merge branch 'q3k/lock-2-electric-boogaloo' into 'master'Clifford Wolf2018-07-213-72/+154
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| * Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/lock-2-elec...Sergiusz Bazanski2018-07-213-95/+374
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| * | Use UI lock for yieldingSergiusz Bazanski2018-07-203-12/+38
| * | Nuke IdStringDBSergiusz Bazanski2018-07-202-47/+38
| * | Remove dead code.Sergiusz Bazanski2018-07-201-2/+0
| * | clang-format and uncomment debugSergiusz Bazanski2018-07-201-7/+4
| * | Move pthread yield hack into BaseCtxSergiusz Bazanski2018-07-203-10/+14
| * | Mix-in Deterministic RNG at Context instead of BaseCtxSergiusz Bazanski2018-07-201-2/+2
| * | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/lock-2-elec...Sergiusz Bazanski2018-07-201-10/+15
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| * | | WIP.Serge Bazanski2018-07-173-1/+12
| * | | Add basic external locking, lock from P&RSerge Bazanski2018-07-173-0/+40
| * | | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/lock-2-elec...Serge Bazanski2018-07-174-39/+47
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| * | | | Refactor RNG out to separate DeterministicRNG classSerge Bazanski2018-07-141-57/+67
| * | | | Refactor IdString functionality into IdStringDBSerge Bazanski2018-07-142-24/+30
* | | | | Add Loc constructorsClifford Wolf2018-07-211-0/+3
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* | | | Merge branch 'router1ng' into 'master'Clifford Wolf2018-07-211-87/+340
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| * | | | Bugfix in router1: Also bind src_wireClifford Wolf2018-07-211-0/+2
| * | | | Add final sanity check in router1Clifford Wolf2018-07-211-0/+19
| * | | | Refactoring of router1Clifford Wolf2018-07-211-87/+319
* | | | | Fix placement bug with VexRiscV reported by John McMasterDavid Shah2018-07-211-2/+3
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* | | | Change DelayInfo semantics to what we actually needClifford Wolf2018-07-211-4/+4
* | | | Add getWireDelay APIClifford Wolf2018-07-211-2/+4
* | | | Add Location APIs to generic archClifford Wolf2018-07-201-4/+0
* | | | Improve iCE40 and common Loc codeClifford Wolf2018-07-201-0/+19
* | | | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into gridapiClifford Wolf2018-07-201-10/+15
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| * | | ice40: Adding cell definition for DSPsDavid Shah2018-07-191-2/+1