| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge pull request #825 from antmicro/chain_swap_fix | gatecat | 2021-09-23 | 1 | -2/+15 |
| |\ | | | | | Fix chain swap | ||||
| | * | Fix chain swap | Maciej Dudek | 2021-09-23 | 1 | -2/+15 |
| | | | | | | | | | | | | | | | | | | | | | | | | | Issue was due to dest_bels being not cleared between clusters unbindes, causing newly bind bels to be unbinded and having their old bel value changed to new bel value. Then when swap failed 2 cells were being bind to a single bel. I tested leaving dest_bels in the function scope and moving it to the loop scope. Code with dest_bels in the loop scope was faster than leaving it in the function scope, and checking if the cell is in the processed cluster. Signed-off-by: Maciej Dudek <mdudek@antmicro.com> | ||||
| * | | Merge pull request #822 from YosysHQ/gatecat/nexus-split-vcc | gatecat | 2021-09-23 | 3 | -0/+7 |
| |\ \ | | | | | | | nexus: Support for split Vcc routing | ||||
| | * | | nexus: Support for split Vcc routing | gatecat | 2021-09-22 | 3 | -0/+7 |
| | | | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | | | Merge pull request #824 from YosysHQ/gatecat/py-sigint | gatecat | 2021-09-23 | 1 | -1/+7 |
| |\ \ \ | |_|/ |/| | | python: Restore SIGINT handler while running a Python script | ||||
| | * | | python: Restore SIGINT handler while running a Python script | gatecat | 2021-09-22 | 1 | -1/+7 |
| | | | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | | | Merge pull request #823 from YosysHQ/gatecat/nexus-r1-tweaks | gatecat | 2021-09-22 | 2 | -2/+4 |
| |\ \ \ | |/ / |/| | | nexus: Tweaks for router1 performance | ||||
| | * | | nexus: Tweaks for router1 performance | gatecat | 2021-09-22 | 2 | -2/+4 |
| | |/ | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | | Merge pull request #821 from YosysHQ/gatecat/dsp-fix | gatecat | 2021-09-22 | 5 | -36/+80 |
| |\ \ | |/ |/| | nexus: Fix DSP macro placement | ||||
| | * | placer1: Remove redundant relative constraint check | gatecat | 2021-09-22 | 1 | -4/+0 |
| | | | | | | | | | | | | | Macros with potentially inconsistent spacing are now permissible. Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| | * | nexus: Fix DSP macro placement | gatecat | 2021-09-22 | 4 | -32/+80 |
| |/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Merge pull request #815 from antmicro/nexus-fix-siologic-handling | gatecat | 2021-09-20 | 2 | -2/+234 |
| |\ | | | | | nexus: Fixed an improved SIOLOGIC handling | ||||
| | * | Added support for syn_useioff for enabling tri-state control FF integration ↵ | Maciej Kurc | 2021-09-20 | 1 | -13/+23 |
| | | | | | | | | | | | | | into IOLOGIC. Signed-off-by: Maciej Kurc <mkurc@antmicro.com> | ||||
| | * | Use correct names for IDDRX1_ODDRX1 FASM features | Maciej Kurc | 2021-09-17 | 2 | -22/+4 |
| | | | | | | | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com> | ||||
| | * | Added automatic inference and integration of FFs driving T pin into IOLOGIC | Maciej Kurc | 2021-09-17 | 2 | -16/+177 |
| | | | | | | | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com> | ||||
| | * | Added handling of the case when tri-state control net bypasses SIOLOGIC bel | Maciej Kurc | 2021-09-17 | 1 | -2/+81 |
| | | | | | | | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com> | ||||
| * | | placer1: Fix cluster swap cost updates | gatecat | 2021-09-18 | 1 | -8/+4 |
| | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | | timing: Always use max delay for required time | gatecat | 2021-09-18 | 1 | -3/+5 |
| | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | | timing: Fix slack for unconstrained clocks | gatecat | 2021-09-18 | 1 | -6/+7 |
| | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | | Merge pull request #817 from YosysHQ/gatecat/chain-swap | gatecat | 2021-09-18 | 1 | -47/+105 |
| |\ \ | |/ |/| | placer1: Allow swapping chains with other chains | ||||
| | * | placer1: Allow swapping chains with other chains | gatecat | 2021-09-17 | 1 | -47/+105 |
| |/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Merge pull request #813 from YosysHQ/gatecat/py-on-fail | gatecat | 2021-09-17 | 2 | -1/+16 |
| |\ | | | | | command: Allow running Python on failure for state introspection | ||||
| | * | command: Allow running Python on failure for state introspection | gatecat | 2021-09-16 | 2 | -1/+16 |
| |/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Merge pull request #806 from yrabbit/extend-placement | gatecat | 2021-09-08 | 3 | -16/+74 |
| |\ | | | | | gowin: Add constraints on primitive placement. | ||||
| | * | Merge branch 'master' into extend-placement | YRabbit | 2021-09-08 | 1 | -5/+18 |
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| | * \ | Merge branch 'master' into extend-placement | YRabbit | 2021-09-07 | 3 | -4/+12 |
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| | * \ \ | Merge branch 'combine-dff' into extend-placement | YRabbit | 2021-09-04 | 1 | -2/+26 |
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| | | * \ \ | Merge branch 'master' into combine-dff | YRabbit | 2021-09-02 | 4 | -11/+24 |
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| | | * | | | | gowin: Place DFFs of different types in the slice. | YRabbit | 2021-08-31 | 1 | -2/+26 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow the registers of the same type or pairs shown below to be placed in the same slide: |--------|--------| | DFFS | DFFR | | DFFSE | DFFRE | | DFFP | DFFC | | DFFPE | DFFCE | | DFFNS | DFFNR | | DFFNSE | DFFNRE | | DFFNP | DFFNC | | DFFNPE | DFFNCE | Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | ||||
| | * | | | | | Merge branch 'master' into extend-placement | YRabbit | 2021-09-04 | 4 | -11/+24 |
| | |\ \ \ \ \ | | |/ / / / | |/| / / / | | |/ / / | |||||
| | * | | | | gowin: Add constraints on primitive placement. | YRabbit | 2021-08-31 | 3 | -14/+48 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added support for the INS_LOC instruction in the constraints file (.CST), which is used to specify object placement. Expanded treatment of IO_LOC/IO_PORT constraints, which now can be applied to both ports and IO buffers. Port constraints have priority. Signed-off-by: YRabbit <rabbit@yrabbit.cyou> | ||||
| * | | | | | Merge pull request #808 from acomodi/fix-xdc | gatecat | 2021-09-08 | 1 | -0/+2 |
| |\ \ \ \ \ | |_|_|_|/ |/| | | | | interchange: xdc: add more not_implemented commands | ||||
| | * | | | | interchange: xdc: add more not_implemented commands | Alessandro Comodi | 2021-09-08 | 1 | -0/+2 |
| |/ / / / | | | | | | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | | | | Merge pull request #807 from acomodi/fix-xdc | gatecat | 2021-09-07 | 1 | -5/+18 |
| |\ \ \ \ | |_|_|/ |/| | | | interchange: xdc: add common not_implemented function | ||||
| | * | | | interchange: xdc: add common not_implemented function | Alessandro Comodi | 2021-09-07 | 1 | -5/+18 |
| |/ / / | | | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | | | clangformat | gatecat | 2021-09-06 | 1 | -2/+4 |
| | | | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | | | router2: Fix uninitialised values | gatecat | 2021-09-06 | 1 | -1/+1 |
| | | | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | | | nexus: Fix getBelGlobalBuf | gatecat | 2021-09-02 | 1 | -1/+5 |
| | | | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | | | router2: Fix explored count | gatecat | 2021-09-02 | 1 | -0/+2 |
| | |/ |/| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | | Merge pull request #790 from acomodi/place-only-same-cluster-in-site | gatecat | 2021-08-31 | 4 | -11/+24 |
| |\ \ | |/ |/| | interchange: place only cells belonging to the same clusters in the same site | ||||
| | * | interchange: clusters: fix other cluster allowance checks in same site | Alessandro Comodi | 2021-08-31 | 1 | -7/+2 |
| | | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| | * | interchange: entirely disable cache when binding site routing | Alessandro Comodi | 2021-08-31 | 1 | -6/+6 |
| | | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| | * | gh: interchange: bump python-interchange tag | Alessandro Comodi | 2021-08-31 | 1 | -1/+1 |
| | | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| | * | interchange: disallow placing cells on sites with clusters | Alessandro Comodi | 2021-08-27 | 2 | -4/+22 |
| |/ | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | clangformat | gatecat | 2021-08-26 | 1 | -3/+3 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Merge pull request #805 from YosysHQ/gatecat/py-portref-byvalue | gatecat | 2021-08-26 | 1 | -10/+10 |
| |\ | | | | | python: Wrap PortRef by value | ||||
| | * | python: Wrap PortRef by value | gatecat | 2021-08-26 | 1 | -10/+10 |
| |/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Merge pull request #710 from Ravenslofty/mistral-mlab-as-lab | gatecat | 2021-08-24 | 4 | -50/+85 |
| |\ | | | | | mistral: Use MLABs as if they're LABs (for now) | ||||
| | * | mistral: Permute MLAB init bits correctly | gatecat | 2021-08-24 | 1 | -0/+22 |
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| | * | mistral: Use MLABs as if they're LABs (for now) | Lofty | 2021-08-17 | 4 | -50/+63 |
| | | | | | | | | | Signed-off-by: Lofty <dan.ravensloft@gmail.com> | ||||
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