Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | machxo2: Set Pip and Wire delays to reasonable fake values mirroring | William D. Jones | 2021-07-01 | 1 | -2/+2 |
| | | | | estimateDelay. | ||||
* | clangformat | gatecat | 2021-07-01 | 1 | -1/+5 |
| | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Merge pull request #744 from YosysHQ/gatecat/const-in-macro | gatecat | 2021-07-01 | 1 | -1/+1 |
|\ | | | | | interchange: Fix handling of constants in macros | ||||
| * | interchange: Fix handling of constants in macros | gatecat | 2021-07-01 | 1 | -1/+1 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | | Merge pull request #743 from YosysHQ/gatecat/site-rsv-ports | gatecat | 2021-07-01 | 5 | -0/+69 |
|\ \ | | | | | | | interchange: Reserve site ports only reachable from dedicated routing | ||||
| * | | interchange: Reserve site ports only reachable from dedicated routing | gatecat | 2021-07-01 | 5 | -0/+69 |
| |/ | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | | Merge pull request #742 from acomodi/interchange-do-not-output-zero-user-nets | gatecat | 2021-07-01 | 1 | -1/+12 |
|\ \ | |/ |/| | interchange: phys: do not output nets which have no users | ||||
| * | interchange: phys: do not output nets which have no users | Alessandro Comodi | 2021-07-01 | 1 | -1/+12 |
|/ | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
* | Merge pull request #741 from acomodi/fix-ded-interc | gatecat | 2021-06-30 | 1 | -8/+14 |
|\ | | | | | interchange: fix dedicated interconnect exploration | ||||
| * | interchange: fix dedicated interconnect exploration | Alessandro Comodi | 2021-06-30 | 1 | -8/+14 |
|/ | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
* | Merge pull request #739 from YosysHQ/gatecat/usp-io-macro | gatecat | 2021-06-30 | 5 | -1/+91 |
|\ | | | | | interchange: Place entire IO macro based on routeability | ||||
| * | interchange: Fix dedicated interconnect check when site is the same | gatecat | 2021-06-30 | 1 | -1/+4 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Place IO macro content based on routing | gatecat | 2021-06-30 | 1 | -0/+79 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | interchange: Track the macros that cells have been expanded from | gatecat | 2021-06-29 | 3 | -0/+8 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | | Merge pull request #738 from YosysHQ/json_load_reinit | gatecat | 2021-06-30 | 3 | -11/+11 |
|\ \ | | | | | | | Preserve ArchArgs and reinit Context when applicable in GUI, fixes #737 | ||||
| * | | Preserve ArchArgs and reinit Context when applicable in GUI | Miodrag Milanovic | 2021-06-30 | 3 | -11/+11 |
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* / | loading json should be disabled in this place | Miodrag Milanovic | 2021-06-30 | 1 | -1/+1 |
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* | Merge pull request #736 from YosysHQ/gatecat/pp-multi-output | gatecat | 2021-06-28 | 1 | -13/+2 |
|\ | | | | | interchange: Allow site wires driven by more than one bel | ||||
| * | interchange: Allow site wires driven by more than one bel | gatecat | 2021-06-28 | 1 | -13/+2 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | | Merge pull request #735 from YosysHQ/gatecat/ic-disconn-belpin | gatecat | 2021-06-28 | 1 | -1/+1 |
|\ \ | |/ |/| | interchange: Handle disconnected bel pins in dedicated interconnect | ||||
| * | interchange: Handle disconnected bel pins in dedicated interconnect | gatecat | 2021-06-28 | 1 | -1/+1 |
|/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Merge pull request #734 from acomodi/remove-rw-patch | gatecat | 2021-06-24 | 1 | -3/+0 |
|\ | | | | | ci: remove RapidWright patching | ||||
| * | ci: remove RapidWright patching | Alessandro Comodi | 2021-06-24 | 1 | -3/+0 |
|/ | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
* | Merge pull request #733 from acomodi/interchange-move-macro-before-io | gatecat | 2021-06-18 | 1 | -1/+1 |
|\ | | | | | interchange: arch: move macro expansion step before ios packing | ||||
| * | interchange: arch: move macro expansion step before ios packing | Alessandro Comodi | 2021-06-18 | 1 | -1/+1 |
|/ | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
* | Merge pull request #731 from YosysHQ/gatecat/timing-mem-error | gatecat | 2021-06-17 | 1 | -4/+11 |
|\ | | | | | sta: Fix a memory error introduced by using dict instead of unordered_map | ||||
| * | sta: Fix a memory error introduced by the dict move | gatecat | 2021-06-17 | 1 | -4/+11 |
|/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Merge pull request #730 from YosysHQ/gatecat/dcc-routehtru | gatecat | 2021-06-17 | 3 | -3/+62 |
|\ | | | | | nexus: Fix some 17k reliability issues | ||||
| * | nexus: Disable center DCC-thrus on 17k device | gatecat | 2021-06-16 | 3 | -1/+29 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | nexus: Fix FASM gen for DCC-thru | gatecat | 2021-06-16 | 1 | -3/+34 |
|/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Merge pull request #728 from YosysHQ/gatecat/nexus-ram | gatecat | 2021-06-15 | 7 | -2/+384 |
|\ | | | | | interchange/nexus: Add RAM techmap rule and a RAM test | ||||
| * | interchange: Bump versions | gatecat | 2021-06-15 | 1 | -2/+2 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | nexus: Add modified version of RAM test | gatecat | 2021-06-15 | 5 | -0/+206 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | nexus: Add PDPSC16K->PDPSC16K_MODE to remap rules | gatecat | 2021-06-15 | 1 | -0/+176 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | | Merge pull request #729 from acomodi/interchange-fix-phys-net-writer | gatecat | 2021-06-15 | 1 | -5/+2 |
|\ \ | | | | | | | interchange: fix phys net writer | ||||
| * | | interchange: fix phys net writer | Alessandro Comodi | 2021-06-15 | 1 | -5/+2 |
|/ / | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
* | | Merge pull request #727 from YosysHQ/gatecat/ic-undriven | gatecat | 2021-06-14 | 3 | -5/+9 |
|\| | | | | | interchange: Cope with undriven nets in more places | ||||
| * | interchange: Cope with undriven nets in more places | gatecat | 2021-06-14 | 3 | -5/+9 |
|/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Merge pull request #724 from YosysHQ/gatecat/update-names | gatecat | 2021-06-12 | 204 | -282/+282 |
|\ | | | | | Update deadnames and emails | ||||
| * | Bump tests submodule | gatecat | 2021-06-12 | 1 | -0/+0 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Update URLs | gatecat | 2021-06-12 | 3 | -9/+9 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Fixing old emails and names in copyrights | gatecat | 2021-06-12 | 201 | -273/+273 |
| | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | | Merge pull request #726 from YosysHQ/gatecat/mem-errors | gatecat | 2021-06-12 | 1 | -1/+1 |
|\ \ | |/ |/| | HeAP: Fix memory error introduced by switch to dict | ||||
| * | HeAP: Fix memory error introduced by switch to dict | gatecat | 2021-06-12 | 1 | -1/+1 |
|/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Merge pull request #720 from acomodi/interchange-clusters | gatecat | 2021-06-11 | 13 | -30/+715 |
|\ | | | | | interchange: enable clusters support | ||||
| * | interchange: ci: add RW patch for missing cell bel maps | Alessandro Comodi | 2021-06-11 | 1 | -0/+3 |
| | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | interchange: clusters: always get cell bel map and add asserts | Alessandro Comodi | 2021-06-11 | 1 | -23/+13 |
| | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | interchange: ci: update python-interchange tag | Alessandro Comodi | 2021-06-11 | 1 | -1/+1 |
| | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | interchange: run clang formatter | Alessandro Comodi | 2021-06-11 | 2 | -22/+18 |
| | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> | ||||
| * | interchange: clusters: adjust comments | Alessandro Comodi | 2021-06-11 | 2 | -11/+16 |
| | | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com> |