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* Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into ↵Sergiusz Bazanski2018-07-2122-682/+1466
|\ | | | | | | q3k/lock-2-electric-boogaloo
| * Added driver and users for netsMiodrag Milanovic2018-07-211-0/+8
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| * Merge branch 'router1ng' into 'master'Clifford Wolf2018-07-212-87/+341
| |\ | | | | | | | | | | | | Router1ng See merge request SymbioticEDA/nextpnr!13
| | * Bugfix in router1: Also bind src_wireClifford Wolf2018-07-211-0/+2
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | * Add final sanity check in router1Clifford Wolf2018-07-211-0/+19
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | * Refactoring of router1Clifford Wolf2018-07-212-87/+320
| | | | | | | | | | | | | | | | | | | | | | | | | | | - Use source-sink pairs as jobs, not whole nets - Route nets with smallest slack first - Preserve routes for already routed source-sink pairs - Add small incentive for re-using wires Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | Map ports to netsMiodrag Milanovic2018-07-211-0/+14
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| * | create io cells out of ascMiodrag Milanovic2018-07-211-0/+27
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| * | add cells that are in default state or no configurationMiodrag Milanovic2018-07-211-0/+40
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| * | Add used cells and attach them to belsMiodrag Milanovic2018-07-211-0/+39
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| * | Fix placement bug with VexRiscV reported by John McMasterDavid Shah2018-07-211-2/+3
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | Assign proper pipsMiodrag Milanovic2018-07-211-9/+27
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| * | add only missing netMiodrag Milanovic2018-07-211-3/+6
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| * Fix minor issue in GUI Wire propertiesClifford Wolf2018-07-211-2/+2
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Change DelayInfo semantics to what we actually needClifford Wolf2018-07-215-16/+38
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Add getWireDelay APIClifford Wolf2018-07-214-2/+17
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Fix warnings and statusMiodrag Milanovic2018-07-213-4/+21
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| * Made save project work as wellMiodrag Milanovic2018-07-215-11/+46
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| * made open project to workMiodrag Milanovic2018-07-211-2/+73
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| * fix introduced bugMiodrag Milanovic2018-07-211-0/+2
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| * make new context work againMiodrag Milanovic2018-07-201-0/+3
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| * Bind wires to netMiodrag Milanovic2018-07-201-629/+637
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| * Merge branch 'gridapi' into 'master'David Shah2018-07-206-17/+115
| |\ | | | | | | | | | | | | Gridapi See merge request SymbioticEDA/nextpnr!11
| | * Add Location APIs to generic archClifford Wolf2018-07-205-24/+49
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | * Improve iCE40 and common Loc codeClifford Wolf2018-07-204-15/+52
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | * Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into gridapiClifford Wolf2018-07-2050-872/+911
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| * | Few more checks on parameters and error eolMiodrag Milanovic2018-07-202-7/+17
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| * | Start adding bitstream reading for ice40Miodrag Milanovic2018-07-204-43/+143
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| | * Add Loc struct for x/y/z bel locationsClifford Wolf2018-07-172-2/+38
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | Re-enable drawing Pips.Sergiusz Bazanski2018-07-201-3/+3
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* | | Use UI lock for yieldingSergiusz Bazanski2018-07-204-14/+40
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* | | clang-formatSergiusz Bazanski2018-07-201-1/+1
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* | | Nuke IdStringDBSergiusz Bazanski2018-07-205-50/+41
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* | | Remove dead code.Sergiusz Bazanski2018-07-201-2/+0
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* | | clang-format and uncomment debugSergiusz Bazanski2018-07-204-45/+39
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* | | Move pthread yield hack into BaseCtxSergiusz Bazanski2018-07-203-10/+14
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* | | Mix-in Deterministic RNG at Context instead of BaseCtxSergiusz Bazanski2018-07-201-2/+2
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* | | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into ↵Sergiusz Bazanski2018-07-2048-825/+754
|\| | | | | | | | | | | q3k/lock-2-electric-boogaloo
| * | ice40: Optimise reset/enable net checkingDavid Shah2018-07-203-11/+14
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ice40: Trim DSP inputs that are constant where appropriateDavid Shah2018-07-192-2/+10
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ice40: Packer and bitstream gen support for MAC16sDavid Shah2018-07-193-3/+111
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ice40: Adding cell definition for DSPsDavid Shah2018-07-195-7/+80
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ice40: Add virtual padin wires for intoscs and GB_IOsDavid Shah2018-07-191-1/+14
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | Reducing performance cost of assertsDavid Shah2018-07-192-9/+11
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ice40: Adding data for extra cell configurationDavid Shah2018-07-192-4/+39
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | Fix click on wire in net sectionMiodrag Milanovic2018-07-181-1/+1
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| * | cell and net now can be selected, fixed issue with highlightMiodrag Milanovic2018-07-181-19/+15
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| * | added clear action for browsing historyMiodrag Milanovic2018-07-184-0/+18
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| * | removed not used and buggy featuresMiodrag Milanovic2018-07-1813-474/+0
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| * | ecp5: Tidying up examplesDavid Shah2018-07-1810-265/+40
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
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