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* Code cleanupMaciej Kurc2022-08-312-68/+39
* Added timing check for cross-domain paths for related clocksMaciej Kurc2022-08-311-4/+104
* Augmented TimingAnalyser class with detection of clock to clock relationsMaciej Kurc2022-08-302-7/+225
* Fixed port timing classes of DCC ports in the Nexus architectureMaciej Kurc2022-08-301-4/+11
* Merge pull request #1017 from YosysHQ/routerfixmyrtle2022-08-222-5/+4
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| * add missing overridesMiodrag Milanovic2022-08-221-3/+3
| * Fix parameter orderMiodrag Milanovic2022-08-221-2/+1
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* Merge pull request #1016 from atsampson/python3myrtle2022-08-217-16/+16
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| * Use CMake's Python3 rather than PythonInterp in subdirsAdam Sampson2022-08-217-16/+16
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* pybindings: Mark CellInfo::bel as readonlygatecat2022-08-181-2/+1
* Merge pull request #1014 from LAK132/mastermyrtle2022-08-181-4/+4
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| * Replace deprecated method of finding Python 3LAK1322022-08-171-4/+4
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* Merge pull request #1013 from YosysHQ/gatecat/viaduct-argsmyrtle2022-08-151-0/+14
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| * viaduct: Allow passing command line options to uarch with -ogatecat2022-08-151-0/+14
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* Merge pull request #1012 from YosysHQ/gatecat/refactor-id-inmyrtle2022-08-1124-203/+153
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| * refactor: Use IdString::in instead of || chainsgatecat2022-08-1024-203/+153
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* Merge pull request #1011 from YosysHQ/gatecat/nexus-lram-tmgmyrtle2022-08-103-0/+30
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| * nexus: Add timing data for LRAMgatecat2022-08-103-0/+30
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* Merge pull request #1010 from YosysHQ/gatecat/idfmyrtle2022-08-1022-153/+152
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| * refactor: id(stringf(...)) to new idf(...) helpergatecat2022-08-1022-153/+152
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* Merge pull request #1008 from YosysHQ/gatecat/generic-addbelpinmyrtle2022-08-043-25/+12
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| * generic: addBelPin with direction as an arggatecat2022-08-043-25/+12
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* Merge pull request #1004 from yrabbit/fix-muxesmyrtle2022-07-217-38/+26
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| * Merge branch 'master' into fix-muxesYRabbit2022-07-201-1/+1
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* | Merge pull request #1005 from YosysHQ/gatecat/nexus-ram-fixesmyrtle2022-07-191-1/+1
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| * | nexus: Fix CSDECODE parsinggatecat2022-07-191-1/+1
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| * gowin: fix compilationYRabbit2022-07-191-8/+0
| * gowin: Remove incomprehensible names of the muxesYRabbit2022-07-197-34/+30
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* Merge pull request #998 from yrabbit/clock-wipmyrtle2022-07-186-1/+479
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| * Merge branch 'master' into clock-wipYRabbit2022-07-1016-49/+198
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* | Merge pull request #999 from YosysHQ/gatecat/pseudocell-apimyrtle2022-07-0816-49/+198
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| * | netlist: Add PseudoCell APIgatecat2022-07-0816-49/+198
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| * gowin: Remove unnecessary functionsYRabbit2022-07-052-33/+9
| * Merge branch 'master' into clock-wipYRabbit2022-07-059-106/+211
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* | Merge pull request #995 from pepijndevos/shadowrammyrtle2022-07-056-0/+187
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| * | use DFF RAM modePepijn de Vos2022-07-021-1/+4
| * | Merge branch 'master' into shadowramPepijn de Vos2022-07-029-25/+324
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| * | | hook up CE maybePepijn de Vos2022-06-163-0/+4
| * | | lutram actually PnRsPepijn de Vos2022-06-065-38/+43
| * | | WIP shadowramPepijn de Vos2022-06-056-0/+175
* | | | Merge pull request #1001 from YosysHQ/gatecat/generic-shared-pybmyrtle2022-07-052-105/+18
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| * | | | generic: Use arch_pybindings_sharedgatecat2022-07-042-105/+18
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* | | | Merge pull request #1002 from gsomlo/gls-pybind11-unbundlemyrtle2022-07-051-1/+6
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| * | | Enable building against unbundled pybind11Gabriel Somlo2022-07-041-1/+6
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| | * gowin: fix compilationYRabbit2022-07-041-0/+1
| | * gowin: Let the placer know about global networksYRabbit2022-07-045-259/+367
| | * Merge branch 'master' into clock-wipYRabbit2022-07-042-10/+11
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* | | Merge pull request #1000 from YosysHQ/gatecat/fix-empty-portsmyrtle2022-06-261-9/+9
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| * | | ice40: Fix accidental creation of empty portsgatecat2022-06-251-9/+9
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* | | Merge pull request #997 from Chandler-Kluser/mastermyrtle2022-06-231-1/+2
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