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-rw-r--r--nexus/arch.cc6
-rw-r--r--nexus/arch.h4
-rw-r--r--nexus/arch_pybindings.h8
-rw-r--r--nexus/fasm.cc12
-rw-r--r--nexus/pack.cc2
5 files changed, 16 insertions, 16 deletions
diff --git a/nexus/arch.cc b/nexus/arch.cc
index 267795dd..93fc1d82 100644
--- a/nexus/arch.cc
+++ b/nexus/arch.cc
@@ -373,8 +373,8 @@ std::vector<std::pair<IdString, std::string>> Arch::getPipAttrs(PipId pip) const
ret.emplace_back(id("GRID_X"), stringf("%d", pip.tile % chip_info->width));
ret.emplace_back(id("GRID_Y"), stringf("%d", pip.tile / chip_info->width));
- ret.emplace_back(id("FROM_TILE_WIRE"), nameOf(loc_data(pip).wires[pip_data(pip).from_wire].name));
- ret.emplace_back(id("TO_TILE_WIRE"), nameOf(loc_data(pip).wires[pip_data(pip).to_wire].name));
+ ret.emplace_back(id("FROM_TILE_WIRE"), nameOf(IdString(loc_data(pip).wires[pip_data(pip).from_wire].name)));
+ ret.emplace_back(id("TO_TILE_WIRE"), nameOf(IdString(loc_data(pip).wires[pip_data(pip).to_wire].name)));
return ret;
}
@@ -936,7 +936,7 @@ void Arch::lookup_cell_clock_out(int type_idx, IdString to_port, IdString &clock
ct.prop_delays.get(), ct.prop_delays.size(), [](const CellPropDelayPOD &pd) { return pd.to_port; },
to_port.index);
NPNR_ASSERT(dly_idx != -1);
- clock = ct.prop_delays[dly_idx].from_port;
+ clock = IdString(ct.prop_delays[dly_idx].from_port);
delay.min_delay = ct.prop_delays[dly_idx].min_delay;
delay.max_delay = ct.prop_delays[dly_idx].max_delay;
}
diff --git a/nexus/arch.h b/nexus/arch.h
index d37c5026..00046d7f 100644
--- a/nexus/arch.h
+++ b/nexus/arch.h
@@ -1444,12 +1444,12 @@ struct Arch : BaseCtx
IdString pip_src_wire_name(PipId pip) const
{
int wire = pip_data(pip).from_wire;
- return db->loctypes[chip_info->grid[pip.tile].loc_type].wires[wire].name;
+ return IdString(db->loctypes[chip_info->grid[pip.tile].loc_type].wires[wire].name);
}
IdString pip_dst_wire_name(PipId pip) const
{
int wire = pip_data(pip).to_wire;
- return db->loctypes[chip_info->grid[pip.tile].loc_type].wires[wire].name;
+ return IdString(db->loctypes[chip_info->grid[pip.tile].loc_type].wires[wire].name);
}
// -------------------------------------------------
diff --git a/nexus/arch_pybindings.h b/nexus/arch_pybindings.h
index 7694090b..dd41ce32 100644
--- a/nexus/arch_pybindings.h
+++ b/nexus/arch_pybindings.h
@@ -30,7 +30,7 @@ namespace PythonConversion {
template <> struct string_converter<BelId>
{
- BelId from_str(Context *ctx, std::string name) { return ctx->getBelByName(ctx->id(name)); }
+ BelId from_str(Context *ctx, std::string name) { return ctx->getBelByName(IdStringList::parse(ctx, name)); }
std::string to_str(Context *ctx, BelId id)
{
@@ -42,7 +42,7 @@ template <> struct string_converter<BelId>
template <> struct string_converter<WireId>
{
- WireId from_str(Context *ctx, std::string name) { return ctx->getWireByName(ctx->id(name)); }
+ WireId from_str(Context *ctx, std::string name) { return ctx->getWireByName(IdStringList::parse(ctx, name)); }
std::string to_str(Context *ctx, WireId id)
{
@@ -54,7 +54,7 @@ template <> struct string_converter<WireId>
template <> struct string_converter<const WireId>
{
- WireId from_str(Context *ctx, std::string name) { return ctx->getWireByName(ctx->id(name)); }
+ WireId from_str(Context *ctx, std::string name) { return ctx->getWireByName(IdStringList::parse(ctx, name)); }
std::string to_str(Context *ctx, WireId id)
{
@@ -66,7 +66,7 @@ template <> struct string_converter<const WireId>
template <> struct string_converter<PipId>
{
- PipId from_str(Context *ctx, std::string name) { return ctx->getPipByName(ctx->id(name)); }
+ PipId from_str(Context *ctx, std::string name) { return ctx->getPipByName(IdStringList::parse(ctx, name)); }
std::string to_str(Context *ctx, PipId id)
{
diff --git a/nexus/fasm.cc b/nexus/fasm.cc
index 9e43972b..0b8b6377 100644
--- a/nexus/fasm.cc
+++ b/nexus/fasm.cc
@@ -144,7 +144,7 @@ struct NexusFasmWriter
{
int r = loc / ctx->chip_info->width;
int c = loc % ctx->chip_info->width;
- return stringf("%sR%dC%d__%s", ctx->nameOf(tile.prefix), r, c, ctx->nameOf(tile.tiletype));
+ return stringf("%sR%dC%d__%s", ctx->nameOf(IdString(tile.prefix)), r, c, ctx->nameOf(IdString(tile.tiletype)));
}
// Look up a tile by location index and tile type
const PhysicalTileInfoPOD &tile_by_type_and_loc(int loc, IdString type)
@@ -180,7 +180,7 @@ struct NexusFasmWriter
void push_tile(int loc, IdString tile_type) { push(tile_name(loc, tile_by_type_and_loc(loc, tile_type))); }
void push_tile(int loc) { push(tile_name(loc, tile_at_loc(loc))); }
// Push a bel name onto the prefix stack
- void push_belname(BelId bel) { push(ctx->nameOf(ctx->bel_data(bel).name)); }
+ void push_belname(BelId bel) { push(ctx->nameOf(IdString(ctx->bel_data(bel).name))); }
// Push the tile group name corresponding to a bel onto the prefix stack
void push_belgroup(BelId bel)
{
@@ -189,14 +189,14 @@ struct NexusFasmWriter
auto &bel_data = ctx->bel_data(bel);
r += bel_data.rel_y;
c += bel_data.rel_x;
- std::string s = stringf("R%dC%d_%s", r, c, ctx->nameOf(ctx->bel_data(bel).name));
+ std::string s = stringf("R%dC%d_%s", r, c, ctx->nameOf(IdString(ctx->bel_data(bel).name)));
push(s);
}
// Push a bel's group and name
void push_bel(BelId bel)
{
push_belgroup(bel);
- fasm_ctx.back() += stringf(".%s", ctx->nameOf(ctx->bel_data(bel).name));
+ fasm_ctx.back() += stringf(".%s", ctx->nameOf(IdString(ctx->bel_data(bel).name)));
}
// Write out a pip in tile.dst.src format
void write_pip(PipId pip)
@@ -204,7 +204,7 @@ struct NexusFasmWriter
auto &pd = ctx->pip_data(pip);
if (pd.flags & PIP_FIXED_CONN)
return;
- std::string tile = tile_name(pip.tile, tile_by_type_and_loc(pip.tile, pd.tile_type));
+ std::string tile = tile_name(pip.tile, tile_by_type_and_loc(pip.tile, IdString(pd.tile_type)));
std::string source_wire = escape_name(ctx->pip_src_wire_name(pip).str(ctx));
std::string dest_wire = escape_name(ctx->pip_dst_wire_name(pip).str(ctx));
out << stringf("%s.PIP.%s.%s", tile.c_str(), dest_wire.c_str(), source_wire.c_str()) << std::endl;
@@ -580,7 +580,7 @@ struct NexusFasmWriter
write_enum(cell, "CLKMUX_FB");
write_cell_muxes(cell);
pop();
- push(stringf("IP_%s", ctx->nameOf(ctx->bel_data(bel).name)));
+ push(stringf("IP_%s", ctx->nameOf(IdString(ctx->bel_data(bel).name))));
for (auto param : sorted_cref(cell->params)) {
const std::string &name = param.first.str(ctx);
if (is_mux_param(name) || name == "CLKMUX_FB" || name == "SEL_FBK")
diff --git a/nexus/pack.cc b/nexus/pack.cc
index 32bdfdb9..4b076e93 100644
--- a/nexus/pack.cc
+++ b/nexus/pack.cc
@@ -1283,7 +1283,7 @@ struct NexusPacker
// Function to check if a wire is general routing; and therefore skipped for cascade purposes
bool is_general_routing(WireId wire)
{
- std::string name = ctx->nameOf(ctx->wire_data(wire).name);
+ std::string name = ctx->nameOf(IdString(ctx->wire_data(wire).name));
if (name.size() == 3 && (name.substr(0, 2) == "JF" || name.substr(0, 2) == "JQ"))
return true;
if (name.size() == 12 && (name.substr(0, 10) == "JCIBMUXOUT"))
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-06 21:53:25 +0000