diff options
Diffstat (limited to 'nexus/constids.inc')
-rw-r--r-- | nexus/constids.inc | 377 |
1 files changed, 377 insertions, 0 deletions
diff --git a/nexus/constids.inc b/nexus/constids.inc new file mode 100644 index 00000000..9b12d197 --- /dev/null +++ b/nexus/constids.inc @@ -0,0 +1,377 @@ +X(BEL) + +X(OXIDE_FF) +X(CLK) +X(CE) +X(LSR) +X(DI) +X(M) +X(Q) + +X(OXIDE_COMB) +X(A) +X(B) +X(C) +X(D) +X(F) +X(FCI) +X(FCO) +X(SEL) +X(F1) +X(OFX) +X(WAD0) +X(WAD1) +X(WAD2) +X(WAD3) +X(WDI) +X(WCK) +X(WRE) + +X(RAMW) +X(A0) +X(A1) +X(B0) +X(B1) +X(C0) +X(C1) +X(D0) +X(D1) +X(WADO0) +X(WADO1) +X(WADO2) +X(WADO3) +X(WCKO) +X(WREO) +X(WDO0) +X(WDO1) +X(WDO2) +X(WDO3) + +X(SEIO33_CORE) +X(T) +X(I) +X(O) +X(I3CRESEN) +X(I3CWKPU) + +X(SEIO18_CORE) +X(DOLP) +X(INLP) +X(INADC) + +X(DIFFIO18_CORE) +X(HSRXEN) +X(HSTXEN) + +X(LUT4) +X(INIT) +X(Z) + +X(WIDEFN9) +X(INIT0) +X(INIT1) + +X(INV) +X(VHI) +X(VLO) + +X(FD1P3BX) +X(FD1P3DX) +X(FD1P3IX) +X(FD1P3JX) +X(CK) +X(SP) +X(PD) +X(CD) +X(GSR) + +X(CCU2) +X(CIN) +X(COUT) +X(S0) +X(S1) +X(F0) + +X(CLKMUX) +X(CEMUX) +X(LSRMUX) +X(REGDDR) +X(SRMODE) +X(REGSET) +X(LSRMODE) + +X(MODE) +X(INJECT) + +X(PLC) +X(CIB) +X(CIB_T) +X(CIB_LR) + +X(IO_TYPE) + + +X(OSCA) +X(OSC) +X(OSC_CORE) +X(HFCLKOUT) +X(LFCLKOUT) +X(HF_CLK_DIV) +X(HFOUTEN) + +X(OXIDE_EBR) +X(CLKA) +X(CLKB) +X(CEA) +X(CEB) +X(CSA0) +X(CSA1) +X(CSA2) +X(CSB0) +X(CSB1) +X(CSB2) +X(ADA0) +X(ADA1) +X(ADA2) +X(ADA3) +X(ADB0) +X(ADB1) +X(WEA) +X(WEB) +X(RSTA) +X(RSTB) + +X(LOC) + +X(IB) +X(OB) +X(OBZ) +X(BB) +X(BB_I3C_A) + +X(SEIO33) +X(SEIO18) +X(DIFFIO18) +X(IOPAD) +X(PADDO) +X(PADDI) +X(PADDT) + +X(PREADD9_CORE) +X(MULT9_CORE) +X(MULT18_CORE) +X(REG18_CORE) +X(MULT18X36_CORE) +X(MULT36_CORE) +X(ACC54_CORE) + +X(PREADD9) +X(MULT9) +X(MULT18) +X(REG18) +X(M18X36) +X(MULT36) +X(ACC54) + +X(MULT9X9) + +X(DCC) +X(CLKI) +X(CLKO) + +X(DPR16X4) +X(INITVAL) +X(DPRAM) + +X(DP16K) +X(PDP16K) +X(PDPSC16K) +X(SP16K) +X(FIFO16K) + +X(DP16K_MODE) +X(PDP16K_MODE) +X(PDPSC16K_MODE) +X(SP16K_MODE) +X(FIFO16K_MODE) + +X(DPSC512K) +X(PDPSC512K) +X(SP512K) + +X(DPSC512K_MODE) +X(PDPSC512K_MODE) +X(SP512K_MODE) + +X(WID) +X(CSDECODE_A) +X(CSDECODE_B) +X(CSDECODE_R) +X(CSDECODE_W) +X(CSDECODE) + +X(CLKW) +X(CLKR) +X(CEW) +X(CER) +X(RST) + +X(DWS0) +X(DWS1) +X(DWS2) +X(DWS3) +X(DWS4) + +X(WEAMUX) + +X(VCC_DRV) + +X(RSTCL) +X(CECL) +X(B2) +X(B3) +X(B4) +X(B5) +X(B6) +X(B7) +X(B8) +X(BSIGNED) +X(C2) +X(C3) +X(C4) +X(C5) +X(C6) +X(C7) +X(C8) +X(C9) + +X(RSTP) +X(CEP) +X(A2) +X(A3) +X(A4) +X(A5) +X(A6) +X(A7) +X(A8) +X(ASIGNED) + +X(SFTCTRL0) +X(SFTCTRL1) +X(SFTCTRL2) +X(SFTCTRL3) +X(ROUNDEN) + +X(LOAD) +X(M9ADDSUB1) +X(M9ADDSUB0) +X(ADDSUB1) +X(ADDSUB0) + +X(CEO) +X(RSTO) +X(CEC) +X(RSTC) +X(SIGNEDI) +X(CECIN) +X(CECTRL) +X(RSTCIN) +X(RSTCTRL) + +X(SIGNEDSTATIC_EN) +X(SUBSTRACT_EN) +X(CSIGNED) +X(BSIGNED_OPERAND_EN) +X(BYPASS_PREADD9) +X(REGBYPSBR0) +X(REGBYPSBR1) +X(REGBYPSBL) +X(SHIFTBR) +X(SHIFTBL) +X(PREADDCAS_EN) +X(SR_18BITSHIFT_EN) +X(OPC) +X(RESET) +X(RESETMODE) + +X(ASIGNED_OPERAND_EN) +X(BYPASS_MULT9) +X(REGBYPSA1) +X(REGBYPSA2) +X(REGBYPSB) +X(SHIFTA) + +X(REGBYPS) + +X(PP) + +X(SIGNEDA) +X(SIGNEDB) +X(RSTOUT) +X(CEOUT) +X(REGINPUTA) +X(REGINPUTB) +X(REGOUTPUT) + +X(MULT18X18) +X(ROUNDBIT) +X(ROUNDHALFUP) +X(ROUNDRTZI) +X(SFTEN) + +X(MULT18X36) +X(MULT36X36H) +X(MULT36X36) + +X(SIGNEDC) +X(REGINPUTC) + +X(MULTPREADD9X9) +X(MULTPREADD18X18) + +X(REGPIPELINE) +X(REGADDSUB) +X(REGLOADC) +X(REGLOADC2) +X(REGCIN) + +X(ACC108CASCADE) +X(ACCUBYPS) +X(ACCUMODE) +X(ADDSUBSIGNREGBYPS1) +X(ADDSUBSIGNREGBYPS2) +X(ADDSUBSIGNREGBYPS3) +X(ADDSUB_CTRL) +X(CASCOUTREGBYPS) +X(CINREGBYPS1) +X(CINREGBYPS2) +X(CINREGBYPS3) +X(CONSTSEL) +X(CREGBYPS1) +X(CREGBYPS2) +X(CREGBYPS3) +X(DSPCASCADE) +X(LOADREGBYPS1) +X(LOADREGBYPS2) +X(LOADREGBYPS3) +X(M9ADDSUBREGBYPS1) +X(M9ADDSUBREGBYPS2) +X(M9ADDSUBREGBYPS3) +X(M9ADDSUB_CTRL) +X(OUTREGBYPS) +X(SIGN) +X(STATICOPCODE_EN) +X(PROGCONST) + +X(MULTADDSUB18X18) +X(MULTADDSUB36X36) + +X(CEPIPE) +X(RSTPIPE) + +X(LOADC) +X(ADDSUB) +X(SIGNED) +X(SUM0) +X(SUM1) +X(CINPUT) |