diff options
Diffstat (limited to 'ice40')
| -rw-r--r-- | ice40/chip.cc | 96 | ||||
| -rw-r--r-- | ice40/chip.h | 359 | ||||
| -rw-r--r-- | ice40/chipdb.py | 89 | ||||
| -rw-r--r-- | ice40/main.cc | 62 | ||||
| -rw-r--r-- | ice40/pybindings.cc | 7 | 
5 files changed, 442 insertions, 171 deletions
| diff --git a/ice40/chip.cc b/ice40/chip.cc index 4cdd98ff..05dbe7e8 100644 --- a/ice40/chip.cc +++ b/ice40/chip.cc @@ -278,10 +278,16 @@ PortPin PortPinFromId(IdString id)  Chip::Chip(ChipArgs args)  {  	if (args.type == ChipArgs::LP384) { -		num_bels = 0; -		bel_data = nullptr; -		num_wires = num_wires_384; -		wire_data = wire_data_384; +		chip_info = chip_info_384; +		return; +	} else if (args.type == ChipArgs::LP1K || args.type == ChipArgs::HX1K) { +		chip_info = chip_info_1k; +		return; +	} else if (args.type == ChipArgs::UP5K) { +		chip_info = chip_info_5k; +		return; +	} else if (args.type == ChipArgs::LP8K || args.type == ChipArgs::HX8K) { +		chip_info = chip_info_8k;  		return;  	} else {  		fprintf(stderr, "Unsupported chip type\n"); @@ -291,13 +297,15 @@ Chip::Chip(ChipArgs args)  	abort();  } +// ----------------------------------------------------------------------- +  BelId Chip::getBelByName(IdString name) const  {  	BelId ret;  	if (bel_by_name.empty()) { -		for (int i = 0; i < num_bels; i++) -			bel_by_name[bel_data[i].name] = i; +		for (int i = 0; i < chip_info.num_bels; i++) +			bel_by_name[chip_info.bel_data[i].name] = i;  	}  	auto it = bel_by_name.find(name); @@ -307,13 +315,21 @@ BelId Chip::getBelByName(IdString name) const  	return ret;  } +WireId Chip::getWireBelPin(BelId bel, PortPin pin) const +{ +	// FIXME +	return WireId(); +} + +// ----------------------------------------------------------------------- +  WireId Chip::getWireByName(IdString name) const  {  	WireId ret;  	if (wire_by_name.empty()) { -		for (int i = 0; i < num_wires; i++) -			wire_by_name[wire_data[i].name] = i; +		for (int i = 0; i < chip_info.num_wires; i++) +			wire_by_name[chip_info.wire_data[i].name] = i;  	}  	auto it = wire_by_name.find(name); @@ -323,8 +339,68 @@ WireId Chip::getWireByName(IdString name) const  	return ret;  } -WireId Chip::getWireBelPin(BelId bel, PortPin pin) const +// ----------------------------------------------------------------------- + +PipId Chip::getPipByName(IdString name) const +{ +	PipId ret; + +	if (pip_by_name.empty()) { +		for (int i = 0; i < chip_info.num_pips; i++) { +			PipId pip; +			pip.index = i; +			pip_by_name[getPipName(pip)] = i; +		} +	} + +	auto it = pip_by_name.find(name); +	if (it != pip_by_name.end()) +		ret.index = it->second; + +	return ret; +} + +// ----------------------------------------------------------------------- + +void Chip::getBelPosition(BelId bel, float &x, float &y) const  {  	// FIXME -	return WireId(); +} + +void Chip::getWirePosition(WireId wire, float &x, float &y) const +{ +	// FIXME +} + +void Chip::getPipPosition(WireId wire, float &x, float &y) const +{ +	// FIXME +} + +vector<GraphicElement> Chip::getBelGraphics(BelId bel) const +{ +	vector<GraphicElement> ret; +	// FIXME +	return ret; +} + +vector<GraphicElement> Chip::getWireGraphics(WireId wire) const +{ +	vector<GraphicElement> ret; +	// FIXME +	return ret; +} + +vector<GraphicElement> Chip::getPipGraphics(PipId pip) const +{ +	vector<GraphicElement> ret; +	// FIXME +	return ret; +} + +vector<GraphicElement> Chip::getFrameGraphics() const +{ +	vector<GraphicElement> ret; +	// FIXME +	return ret;  } diff --git a/ice40/chip.h b/ice40/chip.h index 6113a869..1f46ccd2 100644 --- a/ice40/chip.h +++ b/ice40/chip.h @@ -166,48 +166,41 @@ struct BelInfoPOD  	BelType type;  }; -struct WireDelayPOD -{ -	int32_t wire_index; -	float delay; -}; -  struct BelPortPOD  {  	int32_t bel_index;  	PortPin port;  }; +struct PipInfoPOD +{ +	int32_t src, dst; +	float delay; +}; +  struct WireInfoPOD  {  	const char *name; -	int num_uphill, num_downhill, num_bidir; -	WireDelayPOD *wires_uphill, *wires_downhill, *wires_bidir; +	int num_uphill, num_downhill; +	int *pips_uphill, *pips_downhill;  	int num_bels_downhill;  	BelPortPOD bel_uphill;  	BelPortPOD *bels_downhill;  }; -extern int num_bels_384; -extern int num_bels_1k; -extern int num_bels_5k; -extern int num_bels_8k; - -extern BelInfoPOD bel_data_384[]; -extern BelInfoPOD bel_data_1k[]; -extern BelInfoPOD bel_data_5k[]; -extern BelInfoPOD bel_data_8k[]; - -extern int num_wires_384; -extern int num_wires_1k; -extern int num_wires_5k; -extern int num_wires_8k; +struct ChipInfoPOD +{ +	int num_bels, num_wires, num_pips; +	BelInfoPOD *bel_data; +	WireInfoPOD *wire_data; +	PipInfoPOD *pip_data; +}; -extern WireInfoPOD wire_data_384[]; -extern WireInfoPOD wire_data_1k[]; -extern WireInfoPOD wire_data_5k[]; -extern WireInfoPOD wire_data_8k[]; +extern ChipInfoPOD chip_info_384; +extern ChipInfoPOD chip_info_1k; +extern ChipInfoPOD chip_info_5k; +extern ChipInfoPOD chip_info_8k;  // ----------------------------------------------------------------------- @@ -218,6 +211,9 @@ struct BelId  	bool nil() const {  		return index < 0;  	} + +	bool operator==(const BelId &other) const { return index == other.index; } +	bool operator!=(const BelId &other) const { return index != other.index; }  };  struct WireId @@ -227,6 +223,27 @@ struct WireId  	bool nil() const {  		return index < 0;  	} + +	bool operator==(const WireId &other) const { return index == other.index; } +	bool operator!=(const WireId &other) const { return index != other.index; } +}; + +struct PipId +{ +	int32_t index = -1; + +	bool nil() const { +		return index < 0; +	} + +	bool operator==(const PipId &other) const { return index == other.index; } +	bool operator!=(const PipId &other) const { return index != other.index; } +}; + +struct BelPin +{ +	BelId bel; +	PortPin pin;  };  namespace std @@ -246,6 +263,14 @@ namespace std  			return wire.index;  		}  	}; + +	template<> struct hash<PipId> +        { +		std::size_t operator()(const PipId &wire) const noexcept +		{ +			return wire.index; +		} +	};  }  // ----------------------------------------------------------------------- @@ -273,12 +298,36 @@ struct BelRange  // ----------------------------------------------------------------------- -struct AllWireIterator +struct BelPinIterator  { -	int cursor; +	BelPortPOD *ptr = nullptr; + +	void operator++() { ptr++; } +	bool operator!=(const BelPinIterator &other) const { return ptr != other.ptr; } + +	BelPin operator*() const { +		BelPin ret; +		ret.bel.index = ptr->bel_index; +		ret.pin = ptr->port; +		return ret; +	} +}; + +struct BelPinRange +{ +	BelPinIterator b, e; +	BelPinIterator begin() const { return b; } +	BelPinIterator end() const { return e; } +}; + +// ----------------------------------------------------------------------- + +struct WireIterator +{ +	int cursor = -1;  	void operator++() { cursor++; } -	bool operator!=(const AllWireIterator &other) const { return cursor != other.cursor; } +	bool operator!=(const WireIterator &other) const { return cursor != other.cursor; }  	WireId operator*() const {  		WireId ret; @@ -287,71 +336,57 @@ struct AllWireIterator  	}  }; -struct AllWireRange +struct WireRange  { -	AllWireIterator b, e; -	AllWireIterator begin() const { return b; } -	AllWireIterator end() const { return e; } +	WireIterator b, e; +	WireIterator begin() const { return b; } +	WireIterator end() const { return e; }  };  // ----------------------------------------------------------------------- -struct WireDelay -{ -	WireId wire; -	DelayInfo delay; -}; - -struct WireDelayIterator +struct AllPipIterator  { -	WireDelayPOD *ptr = nullptr; +	int cursor = -1; -	void operator++() { ptr++; } -	bool operator!=(const WireDelayIterator &other) const { return ptr != other.ptr; } +	void operator++() { cursor++; } +	bool operator!=(const AllPipIterator &other) const { return cursor != other.cursor; } -	WireDelay operator*() const { -		WireDelay ret; -		ret.wire.index = ptr->wire_index; -		ret.delay.delay = ptr->delay; +	PipId operator*() const { +		PipId ret; +		ret.index = cursor;  		return ret;  	}  }; -struct WireDelayRange +struct AllPipRange  { -	WireDelayIterator b, e; -	WireDelayIterator begin() const { return b; } -	WireDelayIterator end() const { return e; } +	AllPipIterator b, e; +	AllPipIterator begin() const { return b; } +	AllPipIterator end() const { return e; }  };  // ----------------------------------------------------------------------- -struct BelPin -{ -	BelId bel; -	PortPin pin; -}; - -struct BelPinIterator +struct PipIterator  { -	BelPortPOD *ptr = nullptr; +	int *cursor = nullptr; -	void operator++() { ptr++; } -	bool operator!=(const BelPinIterator &other) const { return ptr != other.ptr; } +	void operator++() { cursor++; } +	bool operator!=(const PipIterator &other) const { return cursor != other.cursor; } -	BelPin operator*() const { -		BelPin ret; -		ret.bel.index = ptr->bel_index; -		ret.pin = ptr->port; +	PipId operator*() const { +		PipId ret; +		ret.index = *cursor;  		return ret;  	}  }; -struct BelPinRange +struct PipRange  { -	BelPinIterator b, e; -	BelPinIterator begin() const { return b; } -	BelPinIterator end() const { return e; } +	PipIterator b, e; +	PipIterator begin() const { return b; } +	PipIterator end() const { return e; }  };  // ----------------------------------------------------------------------- @@ -371,36 +406,41 @@ struct ChipArgs  struct Chip  { -	int num_bels, num_wires; -	BelInfoPOD *bel_data; -	WireInfoPOD *wire_data; +	ChipInfoPOD chip_info; -	mutable dict<IdString, int> wire_by_name;  	mutable dict<IdString, int> bel_by_name; +	mutable dict<IdString, int> wire_by_name; +	mutable dict<IdString, int> pip_by_name;  	Chip(ChipArgs args); -	void setBelActive(BelId, bool) { } -	bool getBelActive(BelId) { return true; } +	// -------------------------------------------------  	BelId getBelByName(IdString name) const; -	WireId getWireByName(IdString name) const;  	IdString getBelName(BelId bel) const  	{ -		return bel_data[bel.index].name; +		assert(!bel.nil()); +		return chip_info.bel_data[bel.index].name;  	} -	IdString getWireName(WireId wire) const +	void bindBel(BelId bel, IdString cell) +	{ +	} + +	void unbindBel(BelId bel) +	{ +	} + +	bool checkBelAvail(BelId bel) const  	{ -		return wire_data[wire.index].name;  	}  	BelRange getBels() const  	{  		BelRange range;  		range.b.cursor = 0; -		range.e.cursor = num_bels; +		range.e.cursor = chip_info.num_bels;  		return range;  	} @@ -420,75 +460,156 @@ struct Chip  	BelType getBelType(BelId bel) const  	{ -		return bel_data[bel.index].type; +		assert(!bel.nil()); +		return chip_info.bel_data[bel.index].type;  	} -	// FIXME: void getBelPosition(BelId bel, float &x, float &y) const; -	// FIXME: void getWirePosition(WireId wire, float &x, float &y) const; -	// FIXME: vector<GraphicElement> getBelGraphics(BelId bel) const; -	// FIXME: vector<GraphicElement> getWireGraphics(WireId wire) const; -	// FIXME: vector<GraphicElement> getPipGraphics(WireId src, WireId dst) const; -	// FIXME: vector<GraphicElement> getFrameGraphics() const; +	WireId getWireBelPin(BelId bel, PortPin pin) const; + +	BelPin getBelPinUphill(WireId wire) const +	{ +		BelPin ret; +		assert(!wire.nil()); + +		if (chip_info.wire_data[wire.index].bel_uphill.bel_index >= 0) { +			ret.bel.index = chip_info.wire_data[wire.index].bel_uphill.bel_index; +			ret.pin = chip_info.wire_data[wire.index].bel_uphill.port; +		} -	AllWireRange getWires() const +		return ret; +	} + +	BelPinRange getBelPinsDownhill(WireId wire) const  	{ -		AllWireRange range; -		range.b.cursor = 0; -		range.e.cursor = num_wires; +		BelPinRange range; +		assert(!wire.nil()); +		range.b.ptr = chip_info.wire_data[wire.index].bels_downhill; +		range.e.ptr = range.b.ptr + chip_info.wire_data[wire.index].num_bels_downhill;  		return range;  	} -	WireDelayRange getWiresUphill(WireId wire) const +	// ------------------------------------------------- + +	WireId getWireByName(IdString name) const; + +	IdString getWireName(WireId wire) const  	{ -		WireDelayRange range; -		range.b.ptr = wire_data[wire.index].wires_uphill; -		range.e.ptr = wire_data[wire.index].wires_uphill + wire_data[wire.index].num_uphill; -		return range; +		assert(!wire.nil()); +		return chip_info.wire_data[wire.index].name;  	} -	WireDelayRange getWiresDownhill(WireId wire) const +	void bindWire(WireId bel, IdString net) +	{ +	} + +	void unbindWire(WireId bel)  	{ -		WireDelayRange range; -		range.b.ptr = wire_data[wire.index].wires_downhill; -		range.e.ptr = wire_data[wire.index].wires_downhill + wire_data[wire.index].num_downhill; -		return range;  	} -	WireDelayRange getWiresBidir(WireId wire) const +	bool checkWireAvail(WireId bel) const  	{ -		WireDelayRange range; -		range.b.ptr = wire_data[wire.index].wires_bidir; -		range.e.ptr = wire_data[wire.index].wires_bidir + wire_data[wire.index].num_bidir; +	} + +	WireRange getWires() const +	{ +		WireRange range; +		range.b.cursor = 0; +		range.e.cursor = chip_info.num_wires;  		return range;  	} -	WireDelayRange getWireAliases(WireId wire) const +	// ------------------------------------------------- + +	PipId getPipByName(IdString name) const; + +	IdString getPipName(PipId pip) const +	{ +		assert(!pip.nil()); +		std::string src_name = chip_info.wire_data[chip_info.pip_data[pip.index].src].name; +		std::string dst_name = chip_info.wire_data[chip_info.pip_data[pip.index].dst].name; +		return src_name + "->" + dst_name; +	} + +	void bindPip(PipId bel, IdString net)  	{ -		WireDelayRange range; +	} + +	void unbindPip(PipId bel) +	{ +	} + +	bool checkPipAvail(PipId bel) const +	{ +	} + +	AllPipRange getPips() const +	{ +		AllPipRange range; +		range.b.cursor = 0; +		range.e.cursor = chip_info.num_pips;  		return range;  	} -	WireId getWireBelPin(BelId bel, PortPin pin) const; +	WireId getPipSrcWire(PipId pip) const +	{ +		WireId wire; +		assert(!pip.nil()); +		wire.index = chip_info.pip_data[pip.index].src; +		return wire; +	} -	BelPin getBelPinUphill(WireId wire) const +	WireId getPipDstWire(PipId pip) const  	{ -		BelPin ret; +		WireId wire; +		assert(!pip.nil()); +		wire.index = chip_info.pip_data[pip.index].dst; +		return wire; +	} -		if (wire_data[wire.index].bel_uphill.bel_index >= 0) { -			ret.bel.index = wire_data[wire.index].bel_uphill.bel_index; -			ret.pin = wire_data[wire.index].bel_uphill.port; -		} +	DelayInfo getPipDelay(PipId pip) const +	{ +		DelayInfo delay; +		assert(!pip.nil()); +		delay.delay = chip_info.pip_data[pip.index].delay; +		return delay; +	} -		return ret; +	PipRange getPipsDownhill(WireId wire) const +	{ +		PipRange range; +		assert(!wire.nil()); +		range.b.cursor = chip_info.wire_data[wire.index].pips_downhill; +		range.e.cursor = range.b.cursor + chip_info.wire_data[wire.index].num_downhill; +		return range;  	} -	BelPinRange getBelPinsDownhill(WireId wire) const +	PipRange getPipsUphill(WireId wire) const  	{ -		BelPinRange range; -		range.b.ptr = wire_data[wire.index].bels_downhill; -		range.e.ptr = wire_data[wire.index].bels_downhill + wire_data[wire.index].num_bels_downhill; +		PipRange range; +		assert(!wire.nil()); +		range.b.cursor = chip_info.wire_data[wire.index].pips_uphill; +		range.e.cursor = range.b.cursor + chip_info.wire_data[wire.index].num_uphill; +		return range; +	} + +	PipRange getWireAliases(WireId wire) const +	{ +		PipRange range; +		assert(!wire.nil()); +		range.b.cursor = nullptr; +		range.e.cursor = nullptr;  		return range;  	} + +	// ------------------------------------------------- + +	void getBelPosition(BelId bel, float &x, float &y) const; +	void getWirePosition(WireId wire, float &x, float &y) const; +	void getPipPosition(WireId wire, float &x, float &y) const; +	vector<GraphicElement> getBelGraphics(BelId bel) const; +	vector<GraphicElement> getWireGraphics(WireId wire) const; +	vector<GraphicElement> getPipGraphics(PipId pip) const; +	vector<GraphicElement> getFrameGraphics() const;  };  #endif diff --git a/ice40/chipdb.py b/ice40/chipdb.py index 3b71a6b4..a106b78f 100644 --- a/ice40/chipdb.py +++ b/ice40/chipdb.py @@ -11,7 +11,6 @@ tiles = dict()  wire_uphill = dict()  wire_downhill = dict() -wire_bidir = dict()  bel_name = list()  bel_type = list() @@ -98,12 +97,20 @@ with open(sys.argv[1], "r") as f:          if mode[0] == "routing":              wire_a = int(line[1])              wire_b = mode[1] -            if wire_a not in wire_bidir: -                wire_bidir[wire_a] = set() -            if wire_b not in wire_bidir: -                wire_bidir[wire_b] = set() -            wire_bidir[wire_a].add(wire_b) -            wire_bidir[wire_b].add(wire_b) + +            if wire_a not in wire_downhill: +                wire_downhill[wire_a] = set() +            if wire_b not in wire_uphill: +                wire_uphill[wire_b] = set() +            wire_downhill[wire_a].add(wire_b) +            wire_uphill[wire_b].add(wire_a) + +            if wire_b not in wire_downhill: +                wire_downhill[wire_b] = set() +            if wire_a not in wire_uphill: +                wire_uphill[wire_a] = set() +            wire_downhill[wire_b].add(wire_a) +            wire_uphill[wire_a].add(wire_b)              continue  def add_bel_input(bel, wire, port): @@ -222,51 +229,55 @@ for tile_xy, tile_type in sorted(tiles.items()):  print('#include "chip.h"') -print("int num_bels_%s = %d;" % (dev_name, num_wires)) -print("BelInfoPOD bel_data_%s[%d] = {" % (dev_name, num_wires)) +print("BelInfoPOD bel_data_%s[%d] = {" % (dev_name, len(bel_name)))  for bel in range(len(bel_name)):      print("  {\"%s\", TYPE_%s}%s" % (bel_name[bel], bel_type[bel], "," if bel+1 < len(bel_name) else ""))  print("};")  wireinfo = list() +pipinfo = list() +pipcache = dict()  for wire in range(num_wires): -    num_uphill = 0 -    num_downhill = 0 -    num_bidir = 0 -    num_bels_downhill = 0 -      if wire in wire_uphill: -        num_uphill = len(wire_uphill[wire]) -        print("static WireDelayPOD wire%d_uphill[] = {" % wire) -        print(",\n".join(["  {%d, 1.0}" % other_wire for other_wire in wire_uphill[wire]])) -        print("};") +        pips = list() +        for src in wire_uphill[wire]: +            if (src, wire) not in pipcache: +                pipcache[(src, wire)] = len(pipinfo) +                pipinfo.append("  {%d, %d, 1.0}" % (src, wire)) +            pips.append("%d" % pipcache[(src, wire)]) +        num_uphill = len(pips) +        list_uphill = "wire%d_uppips" % wire +        print("static int wire%d_uppips[] = {%s};" % (wire, ", ".join(pips))) +    else: +        num_uphill = 0 +        list_uphill = "nullptr"      if wire in wire_downhill: -        num_downhill = len(wire_downhill[wire]) -        print("static WireDelayPOD wire%d_downhill[] = {" % wire) -        print(",\n".join(["  {%d, 1.0}" % other_wire for other_wire in wire_downhill[wire]])) -        print("};") - -    if wire in wire_bidir: -        num_bidir = len(wire_bidir[wire]) -        print("static WireDelayPOD wire%d_bidir[] = {" % wire) -        print(",\n".join(["  {%d, 1.0}" % other_wire for other_wire in wire_bidir[wire]])) -        print("};") +        pips = list() +        for dst in wire_downhill[wire]: +            if (wire, dst) not in pipcache: +                pipcache[(wire, dst)] = len(pipinfo) +                pipinfo.append("  {%d, %d, 1.0}" % (wire, dst)) +            pips.append("%d" % pipcache[(wire, dst)]) +        num_downhill = len(pips) +        list_downhill = "wire%d_downpips" % wire +        print("static int wire%d_downpips[] = {%s};" % (wire, ", ".join(pips))) +    else: +        num_downhill = 0 +        list_downhill = "nullptr"      if wire in wire_downhill_belports:          num_bels_downhill = len(wire_downhill_belports[wire])          print("static BelPortPOD wire%d_downbels[] = {" % wire)          print(",\n".join(["  {%d, PIN_%s}" % it for it in wire_downhill_belports[wire]]))          print("};") +    else: +        num_bels_downhill = 0      info = "  {"      info += "\"%d_%d_%s\", " % wire_names_r[wire] -    info += "%d, %d, %d, " % (num_uphill, num_downhill, num_bidir) -    info += ("wire%d_uphill, " % wire) if num_uphill > 0 else "nullptr, " -    info += ("wire%d_downhill, " % wire) if num_downhill > 0 else "nullptr, " -    info += ("wire%d_bidir, " % wire) if num_bidir > 0 else "nullptr, " -    info += "%d, " % (num_bels_downhill) +    info += "%d, %d, %s, %s, %d, " % (num_uphill, num_downhill, list_uphill, list_downhill, num_bels_downhill)      if wire in wire_uphill_belport:          info += "{%d, PIN_%s}, " % wire_uphill_belport[wire] @@ -278,7 +289,15 @@ for wire in range(num_wires):      wireinfo.append(info) -print("int num_wires_%s = %d;" % (dev_name, num_wires)) -print("WireInfoPOD wire_data_%s[%d] = {" % (dev_name, num_wires)) +print("static WireInfoPOD wire_data_%s[%d] = {" % (dev_name, num_wires))  print(",\n".join(wireinfo))  print("};") + +print("static PipInfoPOD pip_data_%s[%d] = {" % (dev_name, len(pipinfo))) +print(",\n".join(pipinfo)) +print("};") + +print("ChipInfoPOD chip_info_%s = {" % dev_name) +print("  %d, %d, %d," % (len(bel_name), num_wires, len(pipinfo))) +print("  bel_data_%s, wire_data_%s, pip_data_%s" % (dev_name, dev_name, dev_name)) +print("};") diff --git a/ice40/main.cc b/ice40/main.cc index e02930bb..afdd1a4a 100644 --- a/ice40/main.cc +++ b/ice40/main.cc @@ -32,7 +32,7 @@ int main(int argc, char *argv[])  	po::options_description options("Allowed options");  	options.add_options()("help,h","show help"); -	options.add_options()("debug","just a check"); +	options.add_options()("test","just a check");  	options.add_options()("gui","start gui");  	options.add_options()("file", po::value<std::string>(), "python file to execute");  	options.add_options()("version,v","show version");	 @@ -80,14 +80,66 @@ int main(int argc, char *argv[])  		return a.exec();  	} -	if (vm.count("debug"))  +	if (vm.count("test"))  	{  		ChipArgs chipArgs;  		chipArgs.type = ChipArgs::LP384; -		Design design(chipArgs);		 -		for (auto bel : design.chip.getBels()) -			printf("%s\n", design.chip.getBelName(bel).c_str()); +		Design design(chipArgs); +		int bel_count = 0, wire_count = 0, pip_count = 0; + +		std::cout << "Checking bel names.\n"; +		for (auto bel : design.chip.getBels()) { +			auto name = design.chip.getBelName(bel); +			assert(bel == design.chip.getBelByName(name)); +			bel_count++; +		} +		std::cout << "  checked " << bel_count << " bels.\n"; + +		std::cout << "Checking wire names.\n"; +		for (auto wire : design.chip.getWires()) { +			auto name = design.chip.getWireName(wire); +			assert(wire == design.chip.getWireByName(name)); +			wire_count++; +		} +		std::cout << "  checked " << wire_count << " wires.\n"; + +		std::cout << "Checking pip names.\n"; +		for (auto pip : design.chip.getPips()) { +			auto name = design.chip.getPipName(pip); +			assert(pip == design.chip.getPipByName(name)); +			pip_count++; +		} +		std::cout << "  checked " << pip_count << " pips.\n"; + +		std::cout << "Checking uphill -> downhill consistency.\n"; +		for (auto dst : design.chip.getWires()) { +			for (auto uphill_pip : design.chip.getPipsUphill(dst)) { +				bool found_downhill = false; +				for (auto downhill_pip : design.chip.getPipsDownhill(design.chip.getPipSrcWire(uphill_pip))) { +					if (uphill_pip == downhill_pip) { +						assert(!found_downhill); +						found_downhill = true; +					} +				} +				assert(found_downhill); +			} +		} + +		std::cout << "Checking downhill -> uphill consistency.\n"; +		for (auto dst : design.chip.getWires()) { +			for (auto downhill_pip : design.chip.getPipsDownhill(dst)) { +				bool found_uphill = false; +				for (auto uphill_pip : design.chip.getPipsUphill(design.chip.getPipDstWire(downhill_pip))) { +					if (uphill_pip == downhill_pip) { +						assert(!found_uphill); +						found_uphill = true; +					} +				} +				assert(found_uphill); +			} +		} +  		return 0;  	} diff --git a/ice40/pybindings.cc b/ice40/pybindings.cc index 2dd558d1..dc13f849 100644 --- a/ice40/pybindings.cc +++ b/ice40/pybindings.cc @@ -52,6 +52,9 @@ void arch_wrap_python() {              .def("getBels", &Chip::getBels)              .def("getWires", &Chip::getWires); -    WRAP_RANGE(AllWire); - +    WRAP_RANGE(Bel); +    WRAP_RANGE(BelPin); +    WRAP_RANGE(Wire); +    WRAP_RANGE(AllPip); +    WRAP_RANGE(Pip);  } | 
