diff options
Diffstat (limited to 'ice40')
-rw-r--r-- | ice40/arch.cc | 25 | ||||
-rw-r--r-- | ice40/arch.h | 3 | ||||
-rw-r--r-- | ice40/arch_pybindings.cc | 2 |
3 files changed, 0 insertions, 30 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc index c29673cc..2270fdc1 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -291,23 +291,6 @@ BelRange Arch::getBelsByTile(int x, int y) const return br; } -BelRange Arch::getBelsAtSameTile(BelId bel) const -{ - BelRange br; - NPNR_ASSERT(bel != BelId()); - int x = chip_info->bel_data[bel.index].x; - int y = chip_info->bel_data[bel.index].y; - int start = bel.index, end = bel.index; - while (start >= 0 && chip_info->bel_data[start].x == x && chip_info->bel_data[start].y == y) - start--; - start++; - br.b.cursor = start; - while (end < chip_info->num_bels && chip_info->bel_data[end].x == x && chip_info->bel_data[end].y == y) - end++; - br.e.cursor = end; - return br; -} - PortType Arch::getBelPinType(BelId bel, PortPin pin) const { NPNR_ASSERT(bel != BelId()); @@ -482,14 +465,6 @@ std::vector<GroupId> Arch::getGroupGroups(GroupId group) const // ----------------------------------------------------------------------- -void Arch::estimatePosition(BelId bel, int &x, int &y, bool &gb) const -{ - NPNR_ASSERT(bel != BelId()); - x = chip_info->bel_data[bel.index].x; - y = chip_info->bel_data[bel.index].y; - gb = chip_info->bel_data[bel.index].type == TYPE_SB_GB; -} - delay_t Arch::estimateDelay(WireId src, WireId dst) const { NPNR_ASSERT(src != WireId()); diff --git a/ice40/arch.h b/ice40/arch.h index 3f6a5324..3aec25a2 100644 --- a/ice40/arch.h +++ b/ice40/arch.h @@ -449,8 +449,6 @@ struct Arch : BaseCtx bool getBelGlobalBuf(BelId bel) const { return chip_info->bel_data[bel.index].type == TYPE_SB_GB; } - BelRange getBelsAtSameTile(BelId bel) const NPNR_DEPRECATED; - BelType getBelType(BelId bel) const { NPNR_ASSERT(bel != BelId()); @@ -681,7 +679,6 @@ struct Arch : BaseCtx // ------------------------------------------------- - void estimatePosition(BelId bel, int &x, int &y, bool &gb) const NPNR_DEPRECATED; delay_t estimateDelay(WireId src, WireId dst) const; delay_t getDelayEpsilon() const { return 20; } delay_t getRipupDelayPenalty() const { return 200; } diff --git a/ice40/arch_pybindings.cc b/ice40/arch_pybindings.cc index 246d0f57..98164e87 100644 --- a/ice40/arch_pybindings.cc +++ b/ice40/arch_pybindings.cc @@ -79,8 +79,6 @@ void arch_wrap_python() conv_to_str<IdString>, conv_from_str<BelId>>::def_wrap(ctx_cls, "getConflictingBelCell"); fn_wrapper_0a<Context, decltype(&Context::getBels), &Context::getBels, wrap_context<BelRange>>::def_wrap(ctx_cls, "getBels"); - fn_wrapper_1a<Context, decltype(&Context::getBelsAtSameTile), &Context::getBelsAtSameTile, wrap_context<BelRange>, - conv_from_str<BelId>>::def_wrap(ctx_cls, "getBelsAtSameTile"); fn_wrapper_2a<Context, decltype(&Context::getBelPinWire), &Context::getBelPinWire, conv_to_str<WireId>, conv_from_str<BelId>, conv_from_str<PortPin>>::def_wrap(ctx_cls, "getBelPinWire"); |