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-rw-r--r--ice40/arch.cc2
-rw-r--r--ice40/arch.h7
2 files changed, 6 insertions, 3 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc
index aa40b80a..197ce746 100644
--- a/ice40/arch.cc
+++ b/ice40/arch.cc
@@ -54,7 +54,7 @@ BelType belTypeFromId(IdString id)
// -----------------------------------------------------------------------
-void IdString::initialize_arch(Context *ctx)
+void IdString::initialize_arch(const Context *ctx)
{
#define X(t) initialize_add(ctx, #t, PIN_##t);
#include "portpins.inc"
diff --git a/ice40/arch.h b/ice40/arch.h
index 9e811ba9..b49451b9 100644
--- a/ice40/arch.h
+++ b/ice40/arch.h
@@ -477,6 +477,9 @@ struct Arch
std::string getChipName();
+ virtual IdString id(const std::string &s) const { abort(); }
+ virtual IdString id(const char *s) const { abort(); }
+
// -------------------------------------------------
BelId getBelByName(IdString name) const;
@@ -484,7 +487,7 @@ struct Arch
IdString getBelName(BelId bel) const
{
assert(bel != BelId());
- return chip_info->bel_data[bel.index].name.get();
+ return id(chip_info->bel_data[bel.index].name.get());
}
void bindBel(BelId bel, IdString cell)
@@ -576,7 +579,7 @@ struct Arch
IdString getWireName(WireId wire) const
{
assert(wire != WireId());
- return chip_info->wire_data[wire.index].name.get();
+ return id(chip_info->wire_data[wire.index].name.get());
}
void bindWire(WireId wire, IdString net)