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-rw-r--r--ice40/arch.h28
1 files changed, 26 insertions, 2 deletions
diff --git a/ice40/arch.h b/ice40/arch.h
index 3b6d23dc..21169298 100644
--- a/ice40/arch.h
+++ b/ice40/arch.h
@@ -350,6 +350,7 @@ struct Arch : BaseCtx
mutable std::unordered_map<IdString, int> bel_by_name;
mutable std::unordered_map<IdString, int> wire_by_name;
mutable std::unordered_map<IdString, int> pip_by_name;
+ mutable std::unordered_map<Loc, int> bel_by_loc;
std::vector<IdString> bel_to_cell;
std::vector<IdString> wire_to_net;
@@ -440,7 +441,24 @@ struct Arch : BaseCtx
return range;
}
- BelRange getBelsAtSameTile(BelId bel) const;
+ Loc getBelLocation(BelId bel) const
+ {
+ Loc loc;
+ loc.x = chip_info->bel_data[bel.index].x;
+ loc.y = chip_info->bel_data[bel.index].y;
+ loc.z = chip_info->bel_data[bel.index].z;
+ return loc;
+ }
+
+ BelId getBelByLocation(Loc loc) const;
+ BelRange getBelsByTile(int x, int y) const;
+
+ bool getBelGlobalBuf(BelId bel) const
+ {
+ return chip_info->bel_data[bel.index].type == TYPE_SB_GB;
+ }
+
+ BelRange getBelsAtSameTile(BelId bel) const NPNR_DEPRECATED;
BelType getBelType(BelId bel) const
{
@@ -530,6 +548,12 @@ struct Arch : BaseCtx
return wire_to_net[wire.index];
}
+ DelayInfo getWireDelay(WireId wire) const
+ {
+ DelayInfo delay;
+ return delay;
+ }
+
WireRange getWires() const
{
WireRange range;
@@ -671,7 +695,7 @@ struct Arch : BaseCtx
// -------------------------------------------------
- void estimatePosition(BelId bel, int &x, int &y, bool &gb) const;
+ void estimatePosition(BelId bel, int &x, int &y, bool &gb) const NPNR_DEPRECATED;
delay_t estimateDelay(WireId src, WireId dst) const;
delay_t getDelayEpsilon() const { return 20; }
delay_t getRipupDelayPenalty() const { return 200; }