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-rw-r--r--gowin/arch.cc4
-rw-r--r--gowin/arch.h37
-rw-r--r--gowin/arch_pybindings.cc6
-rw-r--r--gowin/cells.cc2
-rw-r--r--gowin/cells.h2
-rw-r--r--gowin/main.cc4
-rw-r--r--gowin/pack.cc34
7 files changed, 39 insertions, 50 deletions
diff --git a/gowin/arch.cc b/gowin/arch.cc
index 5e1811ea..85ff4829 100644
--- a/gowin/arch.cc
+++ b/gowin/arch.cc
@@ -1009,8 +1009,8 @@ bool Arch::place()
std::string placer = str_or_default(settings, id("placer"), defaultPlacer);
if (placer == "heap") {
bool have_iobuf_or_constr = false;
- for (auto cell : sorted(cells)) {
- CellInfo *ci = cell.second;
+ for (auto &cell : cells) {
+ CellInfo *ci = cell.second.get();
if (ci->type == id("IOB") || ci->bel != BelId() || ci->attrs.count(id("BEL"))) {
have_iobuf_or_constr = true;
break;
diff --git a/gowin/arch.h b/gowin/arch.h
index 0f975f77..82fcb8c1 100644
--- a/gowin/arch.h
+++ b/gowin/arch.h
@@ -209,7 +209,7 @@ struct BelInfo
IdString name, type;
std::map<IdString, std::string> attrs;
CellInfo *bound_cell;
- std::unordered_map<IdString, PinInfo> pins;
+ dict<IdString, PinInfo> pins;
DecalXY decalxy;
int x, y, z;
bool gb;
@@ -229,27 +229,14 @@ struct CellDelayKey
{
IdString from, to;
inline bool operator==(const CellDelayKey &other) const { return from == other.from && to == other.to; }
+ unsigned int hash() const { return mkhash(from.hash(), to.hash()); }
};
-NEXTPNR_NAMESPACE_END
-namespace std {
-template <> struct hash<NEXTPNR_NAMESPACE_PREFIX CellDelayKey>
-{
- std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX CellDelayKey &dk) const noexcept
- {
- std::size_t seed = std::hash<NEXTPNR_NAMESPACE_PREFIX IdString>()(dk.from);
- seed ^= std::hash<NEXTPNR_NAMESPACE_PREFIX IdString>()(dk.to) + 0x9e3779b9 + (seed << 6) + (seed >> 2);
- return seed;
- }
-};
-} // namespace std
-NEXTPNR_NAMESPACE_BEGIN
-
struct CellTiming
{
- std::unordered_map<IdString, TimingPortClass> portClasses;
- std::unordered_map<CellDelayKey, DelayQuad> combDelays;
- std::unordered_map<IdString, std::vector<TimingClockingInfo>> clockingInfo;
+ dict<IdString, TimingPortClass> portClasses;
+ dict<CellDelayKey, DelayQuad> combDelays;
+ dict<IdString, std::vector<TimingClockingInfo>> clockingInfo;
};
struct ArchRanges : BaseArchRanges
@@ -287,10 +274,10 @@ struct Arch : BaseArch<ArchRanges>
const PackagePOD *package;
const TimingGroupsPOD *speed;
- std::unordered_map<IdString, WireInfo> wires;
- std::unordered_map<IdString, PipInfo> pips;
- std::unordered_map<IdString, BelInfo> bels;
- std::unordered_map<GroupId, GroupInfo> groups;
+ dict<IdString, WireInfo> wires;
+ dict<IdString, PipInfo> pips;
+ dict<IdString, BelInfo> bels;
+ dict<GroupId, GroupInfo> groups;
// These functions include useful errors if not found
WireInfo &wire_info(IdString wire);
@@ -299,16 +286,16 @@ struct Arch : BaseArch<ArchRanges>
std::vector<IdString> bel_ids, wire_ids, pip_ids;
- std::unordered_map<Loc, BelId> bel_by_loc;
+ dict<Loc, BelId> bel_by_loc;
std::vector<std::vector<std::vector<BelId>>> bels_by_tile;
- std::unordered_map<DecalId, std::vector<GraphicElement>> decal_graphics;
+ dict<DecalId, std::vector<GraphicElement>> decal_graphics;
int gridDimX, gridDimY;
std::vector<std::vector<int>> tileBelDimZ;
std::vector<std::vector<int>> tilePipDimZ;
- std::unordered_map<IdString, CellTiming> cellTiming;
+ dict<IdString, CellTiming> cellTiming;
void addWire(IdString name, IdString type, int x, int y);
void addPip(IdString name, IdString type, IdString srcWire, IdString dstWire, DelayQuad delay, Loc loc);
diff --git a/gowin/arch_pybindings.cc b/gowin/arch_pybindings.cc
index 24a55ac7..58dcbae7 100644
--- a/gowin/arch_pybindings.cc
+++ b/gowin/arch_pybindings.cc
@@ -137,9 +137,9 @@ void arch_wrap_python(py::module &m)
fn_wrapper_3a<Context, decltype(&Context::constructDecalXY), &Context::constructDecalXY, wrap_context<DecalXY>,
conv_from_str<DecalId>, pass_through<float>, pass_through<float>>::def_wrap(ctx_cls, "DecalXY");
- typedef std::unordered_map<IdString, std::unique_ptr<CellInfo>> CellMap;
- typedef std::unordered_map<IdString, std::unique_ptr<NetInfo>> NetMap;
- typedef std::unordered_map<IdString, HierarchicalCell> HierarchyMap;
+ typedef dict<IdString, std::unique_ptr<CellInfo>> CellMap;
+ typedef dict<IdString, std::unique_ptr<NetInfo>> NetMap;
+ typedef dict<IdString, HierarchicalCell> HierarchyMap;
readonly_wrapper<Context, decltype(&Context::cells), &Context::cells, wrap_context<CellMap &>>::def_wrap(ctx_cls,
"cells");
diff --git a/gowin/cells.cc b/gowin/cells.cc
index e45cd482..93f1246f 100644
--- a/gowin/cells.cc
+++ b/gowin/cells.cc
@@ -114,7 +114,7 @@ void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_l
replace_port(dff, id_Q, lc, id_Q);
}
-void gwio_to_iob(Context *ctx, CellInfo *nxio, CellInfo *iob, std::unordered_set<IdString> &todelete_cells)
+void gwio_to_iob(Context *ctx, CellInfo *nxio, CellInfo *iob, pool<IdString> &todelete_cells)
{
if (nxio->type == id_IBUF) {
iob->params[id_INPUT_USED] = 1;
diff --git a/gowin/cells.h b/gowin/cells.h
index 30b29f5b..7bf1befd 100644
--- a/gowin/cells.h
+++ b/gowin/cells.h
@@ -87,7 +87,7 @@ void lut_to_lc(const Context *ctx, CellInfo *lut, CellInfo *lc, bool no_dff = tr
void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_lut = false);
// Convert a Gowin IO buffer to a IOB bel
-void gwio_to_iob(Context *ctx, CellInfo *nxio, CellInfo *sbio, std::unordered_set<IdString> &todelete_cells);
+void gwio_to_iob(Context *ctx, CellInfo *nxio, CellInfo *sbio, pool<IdString> &todelete_cells);
NEXTPNR_NAMESPACE_END
diff --git a/gowin/main.cc b/gowin/main.cc
index 674eac03..0f3a61cb 100644
--- a/gowin/main.cc
+++ b/gowin/main.cc
@@ -34,7 +34,7 @@ class GowinCommandHandler : public CommandHandler
public:
GowinCommandHandler(int argc, char **argv);
virtual ~GowinCommandHandler(){};
- std::unique_ptr<Context> createContext(std::unordered_map<std::string, Property> &values) override;
+ std::unique_ptr<Context> createContext(dict<std::string, Property> &values) override;
void setupArchContext(Context *ctx) override{};
void customAfterLoad(Context *ctx) override;
@@ -52,7 +52,7 @@ po::options_description GowinCommandHandler::getArchOptions()
return specific;
}
-std::unique_ptr<Context> GowinCommandHandler::createContext(std::unordered_map<std::string, Property> &values)
+std::unique_ptr<Context> GowinCommandHandler::createContext(dict<std::string, Property> &values)
{
std::regex devicere = std::regex("GW1N([A-Z]*)-(LV|UV)([0-9])([A-Z]{2}[0-9]+)(C[0-9]/I[0-9])");
std::smatch match;
diff --git a/gowin/pack.cc b/gowin/pack.cc
index 204f1c22..d3a749ea 100644
--- a/gowin/pack.cc
+++ b/gowin/pack.cc
@@ -21,7 +21,6 @@
#include <algorithm>
#include <iostream>
#include <iterator>
-#include <unordered_set>
#include "cells.h"
#include "design_utils.h"
#include "log.h"
@@ -34,15 +33,16 @@ static void pack_lut_lutffs(Context *ctx)
{
log_info("Packing LUT-FFs..\n");
- std::unordered_set<IdString> packed_cells;
+ pool<IdString> packed_cells;
std::vector<std::unique_ptr<CellInfo>> new_cells;
- for (auto cell : sorted(ctx->cells)) {
- CellInfo *ci = cell.second;
+ for (auto &cell : ctx->cells) {
+ CellInfo *ci = cell.second.get();
if (ctx->verbose)
log_info("cell '%s' is of type '%s'\n", ctx->nameOf(ci), ci->type.c_str(ctx));
if (is_lut(ctx, ci)) {
std::unique_ptr<CellInfo> packed = create_generic_cell(ctx, ctx->id("SLICE"), ci->name.str(ctx) + "_LC");
- std::copy(ci->attrs.begin(), ci->attrs.end(), std::inserter(packed->attrs, packed->attrs.begin()));
+ for (auto &attr : ci->attrs)
+ packed->attrs[attr.first] = attr.second;
packed_cells.insert(ci->name);
if (ctx->verbose)
log_info("packed cell %s into %s\n", ctx->nameOf(ci), ctx->nameOf(packed.get()));
@@ -89,14 +89,15 @@ static void pack_nonlut_ffs(Context *ctx)
{
log_info("Packing non-LUT FFs..\n");
- std::unordered_set<IdString> packed_cells;
+ pool<IdString> packed_cells;
std::vector<std::unique_ptr<CellInfo>> new_cells;
- for (auto cell : sorted(ctx->cells)) {
- CellInfo *ci = cell.second;
+ for (auto &cell : ctx->cells) {
+ CellInfo *ci = cell.second.get();
if (is_ff(ctx, ci)) {
std::unique_ptr<CellInfo> packed = create_generic_cell(ctx, ctx->id("SLICE"), ci->name.str(ctx) + "_DFFLC");
- std::copy(ci->attrs.begin(), ci->attrs.end(), std::inserter(packed->attrs, packed->attrs.begin()));
+ for (auto &attr : ci->attrs)
+ packed->attrs[attr.first] = attr.second;
if (ctx->verbose)
log_info("packed cell %s into %s\n", ctx->nameOf(ci), ctx->nameOf(packed.get()));
packed_cells.insert(ci->name);
@@ -158,8 +159,8 @@ static void pack_constants(Context *ctx)
bool gnd_used = false;
- for (auto net : sorted(ctx->nets)) {
- NetInfo *ni = net.second;
+ for (auto &net : ctx->nets) {
+ NetInfo *ni = net.second.get();
if (ni->driver.cell != nullptr && ni->driver.cell->type == ctx->id("GND")) {
IdString drv_cell = ni->driver.cell->name;
set_net_constant(ctx, ni, gnd_net.get(), false);
@@ -210,14 +211,14 @@ static bool is_gowin_iob(const Context *ctx, const CellInfo *cell)
// Pack IO buffers
static void pack_io(Context *ctx)
{
- std::unordered_set<IdString> packed_cells;
- std::unordered_set<IdString> delete_nets;
+ pool<IdString> packed_cells;
+ pool<IdString> delete_nets;
std::vector<std::unique_ptr<CellInfo>> new_cells;
log_info("Packing IOs..\n");
- for (auto cell : sorted(ctx->cells)) {
- CellInfo *ci = cell.second;
+ for (auto &cell : ctx->cells) {
+ CellInfo *ci = cell.second.get();
if (is_gowin_iob(ctx, ci)) {
CellInfo *iob = nullptr;
switch (ci->type.index) {
@@ -251,7 +252,8 @@ static void pack_io(Context *ctx)
packed_cells.insert(ci->name);
if (iob != nullptr)
- std::copy(iob->attrs.begin(), iob->attrs.end(), std::inserter(gwiob->attrs, gwiob->attrs.begin()));
+ for (auto &attr : iob->attrs)
+ gwiob->attrs[attr.first] = attr.second;
}
}
for (auto pcell : packed_cells) {
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-15 20:45:19 +0000