diff options
Diffstat (limited to 'fpga_interchange/examples/devices/LIFCL-40')
| -rw-r--r-- | fpga_interchange/examples/devices/LIFCL-40/CMakeLists.txt | 13 | ||||
| -rw-r--r-- | fpga_interchange/examples/devices/LIFCL-40/test_data.yaml | 8 | 
2 files changed, 21 insertions, 0 deletions
diff --git a/fpga_interchange/examples/devices/LIFCL-40/CMakeLists.txt b/fpga_interchange/examples/devices/LIFCL-40/CMakeLists.txt new file mode 100644 index 00000000..d6310116 --- /dev/null +++ b/fpga_interchange/examples/devices/LIFCL-40/CMakeLists.txt @@ -0,0 +1,13 @@ +generate_nexus_device_db( +    device LIFCL-40 +    device_target lifcl40_target +) + +generate_chipdb( +    family ${family} +    device LIFCL-40 +    part LIFCL-40-9BG400C +    device_target ${lifcl40_target} +    device_config ${PYTHON_INTERCHANGE_PATH}/test_data/nexus_device_config.yaml +    test_package CABGA400 +) diff --git a/fpga_interchange/examples/devices/LIFCL-40/test_data.yaml b/fpga_interchange/examples/devices/LIFCL-40/test_data.yaml new file mode 100644 index 00000000..c4787eba --- /dev/null +++ b/fpga_interchange/examples/devices/LIFCL-40/test_data.yaml @@ -0,0 +1,8 @@ +pip_test: +    - src_wire: R3C3_PLC.PLC/JDI0_SLICEA +      dst_wire: R3C3/JF0 +bel_pin_test: +    - bel: R7C3_PLC.PLC/SLICEA_LUT0 +      pin: D +      wire: R7C3_PLC.PLC/JD0_SLICEA +  | 
