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-rw-r--r--dummy/chip.h17
-rw-r--r--ice40/chip.cc68
-rw-r--r--ice40/chip.h138
3 files changed, 187 insertions, 36 deletions
diff --git a/dummy/chip.h b/dummy/chip.h
index ec497e0e..2b2bc613 100644
--- a/dummy/chip.h
+++ b/dummy/chip.h
@@ -22,6 +22,15 @@
#ifndef CHIP_H
#define CHIP_H
+typedef IdString BelType;
+typedef IdString PortPin;
+
+static inline IdString belTypeToId(BelType type) { return type; }
+static inline IdString portPinToId(PortPin type) { return type; }
+
+static inline BelType belTypeFromId(IdString id) { return id; }
+static inline PortPin portPinFromId(IdString id) { return id; }
+
struct BelId
{
uint8_t tile_x = 0, tile_y = 0;
@@ -124,7 +133,7 @@ struct WireDelayRange
struct BelPin
{
BelId bel;
- IdString pin;
+ PortPin pin;
};
struct BelPinIterator
@@ -168,8 +177,8 @@ struct Chip
IdString getWireName(WireId wire) const;
BelRange getBels() const;
- BelRange getBelsByType(IdString type) const;
- IdString getBelType(BelId bel) const;
+ BelRange getBelsByType(BelType type) const;
+ BelType getBelType(BelId bel) const;
void getBelPosition(BelId bel, float &x, float &y) const;
void getWirePosition(WireId wire, float &x, float &y) const;
@@ -184,7 +193,7 @@ struct Chip
// the following will only operate on / return "active" BELs
// multiple active uphill BELs for a wire will cause a runtime error
- WireId getWireBelPin(BelId bel, IdString pin) const;
+ WireId getWireBelPin(BelId bel, PortPin pin) const;
BelPin getBelPinUphill(WireId wire) const;
BelPinRange getBelPinsDownhill(WireId wire) const;
};
diff --git a/ice40/chip.cc b/ice40/chip.cc
index bca78a14..b59e2e80 100644
--- a/ice40/chip.cc
+++ b/ice40/chip.cc
@@ -19,6 +19,38 @@
#include "chip.h"
+// -----------------------------------------------------------------------
+
+IdString belTypeToId(BelType type)
+{
+ if (type == TYPE_A) return "A";
+ return IdString();
+}
+
+BelType belTypeFromId(IdString id)
+{
+ if (id == "A") return TYPE_A;
+ return TYPE_NIL;
+}
+
+// -----------------------------------------------------------------------
+
+IdString PortPinToId(PortPin type)
+{
+ if (type == PIN_FOO) return "FOO";
+ if (type == PIN_BAR) return "BAR";
+ return IdString();
+}
+
+PortPin PortPinFromId(IdString id)
+{
+ if (id == "FOO") return PIN_FOO;
+ if (id == "BAR") return PIN_BAR;
+ return PIN_NIL;
+}
+
+// -----------------------------------------------------------------------
+
Chip::Chip(ChipArgs args)
{
if (args.type == ChipArgs::LP384) {
@@ -32,12 +64,40 @@ Chip::Chip(ChipArgs args)
abort();
}
-BelRange Chip::getBels() const
+BelId Chip::getBelByName(IdString name) const
{
- return BelRange();
+ BelId ret;
+
+ if (bel_by_name.empty()) {
+ for (int i = 0; i < num_bels; i++)
+ bel_by_name[bel_data[i].name] = i;
+ }
+
+ auto it = bel_by_name.find(name);
+ if (it != bel_by_name.end())
+ ret.index = it->second;
+
+ return ret;
+}
+
+WireId Chip::getWireByName(IdString name) const
+{
+ WireId ret;
+
+ if (wire_by_name.empty()) {
+ for (int i = 0; i < num_wires; i++)
+ wire_by_name[wire_data[i].name] = i;
+ }
+
+ auto it = wire_by_name.find(name);
+ if (it != wire_by_name.end())
+ ret.index = it->second;
+
+ return ret;
}
-IdString Chip::getBelName(BelId bel) const
+WireId Chip::getWireBelPin(BelId bel, PortPin pin) const
{
- return "*unknown*";
+ // FIXME
+ return WireId();
}
diff --git a/ice40/chip.h b/ice40/chip.h
index ed7f64b2..21f8a7dc 100644
--- a/ice40/chip.h
+++ b/ice40/chip.h
@@ -24,9 +24,32 @@
// -----------------------------------------------------------------------
+enum BelType
+{
+ TYPE_NIL,
+ TYPE_A
+};
+
+IdString belTypeToId(BelType type);
+BelType belTypeFromId(IdString id);
+
+enum PortPin
+{
+ PIN_NIL,
+ PIN_FOO = 1,
+ PIN_BAR = 2
+};
+
+IdString PortPinToId(PortPin type);
+PortPin PortPinFromId(IdString id);
+
+// -----------------------------------------------------------------------
+
+
struct BelInfoPOD
{
const char *name;
+ BelType type;
};
struct WireDelayPOD
@@ -38,7 +61,7 @@ struct WireDelayPOD
struct BelPortPOD
{
int32_t bel_index;
- int port_index;
+ PortPin port;
};
struct WireInfoPOD
@@ -103,20 +126,25 @@ namespace std
// -----------------------------------------------------------------------
-struct BelIterator
+struct BelsIterator
{
- BelId *ptr = nullptr;
+ int cursor;
- void operator++() { ptr++; }
- bool operator!=(const BelIterator &other) const { return ptr != other.ptr; }
- BelId operator*() const { return *ptr; }
+ void operator++() { cursor++; }
+ bool operator!=(const BelsIterator &other) const { return cursor != other.cursor; }
+
+ BelId operator*() const {
+ BelId ret;
+ ret.index = cursor;
+ return ret;
+ }
};
-struct BelRange
+struct BelsRange
{
- BelIterator b, e;
- BelIterator begin() const { return b; }
- BelIterator end() const { return e; }
+ BelsIterator b, e;
+ BelsIterator begin() const { return b; }
+ BelsIterator end() const { return e; }
};
// -----------------------------------------------------------------------
@@ -177,16 +205,22 @@ struct WireDelayRange
struct BelPin
{
BelId bel;
- IdString pin;
+ PortPin pin;
};
struct BelPinIterator
{
- BelPin *ptr = nullptr;
+ BelPortPOD *ptr = nullptr;
void operator++() { ptr++; }
bool operator!=(const BelPinIterator &other) const { return ptr != other.ptr; }
- BelPin operator*() const { return *ptr; }
+
+ BelPin operator*() const {
+ BelPin ret;
+ ret.bel.index = ptr->bel_index;
+ ret.pin = ptr->port;
+ return ret;
+ }
};
struct BelPinRange
@@ -222,7 +256,8 @@ struct Chip
BelInfoPOD *bel_data;
WireInfoPOD *wire_data;
- // ...
+ mutable dict<IdString, int> wire_by_name;
+ mutable dict<IdString, int> bel_by_name;
Chip(ChipArgs args);
@@ -231,17 +266,48 @@ struct Chip
BelId getBelByName(IdString name) const;
WireId getWireByName(IdString name) const;
- IdString getBelName(BelId bel) const;
- IdString getWireName(WireId wire) const;
- BelRange getBels() const;
- BelRange getBelsByType(IdString type) const;
- IdString getBelType(BelId bel) const;
+ IdString getBelName(BelId bel) const
+ {
+ return bel_data[bel.index].name;
+ }
- void getBelPosition(BelId bel, float &x, float &y) const;
- void getWirePosition(WireId wire, float &x, float &y) const;
- vector<GuiLine> getBelGuiLines(BelId bel) const;
- vector<GuiLine> getWireGuiLines(WireId wire) const;
+ IdString getWireName(WireId wire) const
+ {
+ return wire_data[wire.index].name;
+ }
+
+ BelsRange getBels() const
+ {
+ BelsRange range;
+ range.b.cursor = 0;
+ range.e.cursor = num_bels;
+ return range;
+ }
+
+ BelsRange getBelsByType(BelType type) const
+ {
+ BelsRange range;
+ // FIXME
+#if 0
+ if (type == "TYPE_A") {
+ range.b.cursor = bels_type_a_begin;
+ range.e.cursor = bels_type_a_end;
+ }
+ ...
+#endif
+ return range;
+ }
+
+ BelType getBelType(BelId bel) const
+ {
+ return bel_data[bel.index].type;
+ }
+
+ // FIXME: void getBelPosition(BelId bel, float &x, float &y) const;
+ // FIXME: void getWirePosition(WireId wire, float &x, float &y) const;
+ // FIXME: vector<GuiLine> getBelGuiLines(BelId bel) const;
+ // FIXME: vector<GuiLine> getWireGuiLines(WireId wire) const;
AllWiresRange getWires() const
{
@@ -281,11 +347,27 @@ struct Chip
return range;
}
- // the following will only operate on / return "active" BELs
- // multiple active uphill BELs for a wire will cause a runtime error
- WireId getWireBelPin(BelId bel, IdString pin) const;
- BelPin getBelPinUphill(WireId wire) const;
- BelPinRange getBelPinsDownhill(WireId wire) const;
+ WireId getWireBelPin(BelId bel, PortPin pin) const;
+
+ BelPin getBelPinUphill(WireId wire) const
+ {
+ BelPin ret;
+
+ if (wire_data[wire.index].bel_uphill.bel_index >= 0) {
+ ret.bel.index = wire_data[wire.index].bel_uphill.bel_index;
+ ret.pin = wire_data[wire.index].bel_uphill.port;
+ }
+
+ return ret;
+ }
+
+ BelPinRange getBelPinsDownhill(WireId wire) const
+ {
+ BelPinRange range;
+ range.b.ptr = wire_data[wire.index].bels_downhill;
+ range.e.ptr = wire_data[wire.index].bels_downhill + wire_data[wire.index].num_bels_downhill;
+ return range;
+ }
};
#endif
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-05 00:05:48 +0000