5 files changed, 18 insertions, 18 deletions

diff --git a/common/place_sa.cc b/common/place_sa.cc
index 0fead5d8..3162d88c 100644
--- a/common/place_sa.cc
+++ b/common/place_sa.cc
@@ -51,7 +51,8 @@ class SAPlacer
         int num_bel_types = 0;
         for (auto bel : ctx->getBels()) {
             int x, y;
-            ctx->estimatePosition(bel, x, y);
+            bool gb;
+            ctx->estimatePosition(bel, x, y, gb);
             BelType type = ctx->getBelType(bel);
             int type_idx;
             if (bel_types.find(type) == bel_types.end()) {
@@ -288,18 +289,17 @@ class SAPlacer
     float get_wirelength(NetInfo *net)
     {
         float wirelength = 0;
-        int driver_x = 0, driver_y = 0;
-        bool consider_driver = false;
+        int driver_x, driver_y;
+        bool driver_gb;
         CellInfo *driver_cell = net->driver.cell;
         if (!driver_cell)
             return 0;
         if (driver_cell->bel == BelId())
             return 0;
-        consider_driver =
-                ctx->estimatePosition(driver_cell->bel, driver_x, driver_y);
+        ctx->estimatePosition(driver_cell->bel, driver_x, driver_y, driver_gb);
         WireId drv_wire = ctx->getWireBelPin(
                 driver_cell->bel, ctx->portPinFromId(net->driver.port));
-        if (!consider_driver)
+        if (driver_gb)
             return 0;
         for (auto load : net->users) {
             if (load.cell == nullptr)
@@ -307,7 +307,7 @@ class SAPlacer
             CellInfo *load_cell = load.cell;
             if (load_cell->bel == BelId())
                 continue;
-            // ctx->estimatePosition(load_cell->bel, load_x, load_y);
+            // ctx->estimatePosition(load_cell->bel, load_x, load_y, load_gb);
             WireId user_wire = ctx->getWireBelPin(
                     load_cell->bel, ctx->portPinFromId(load.port));
             // wirelength += std::abs(load_x - driver_x) + std::abs(load_y -
@@ -405,8 +405,9 @@ class SAPlacer
     BelId random_bel_for_cell(CellInfo *cell)
     {
         BelType targetType = ctx->belTypeFromId(cell->type);
-        int x = 0, y = 0;
-        ctx->estimatePosition(cell->bel, x, y);
+        int x, y;
+        bool gb;
+        ctx->estimatePosition(cell->bel, x, y, gb);
         while (true) {
             int nx = ctx->rng(2 * diameter + 1) + std::max(x - diameter, 0);
             int ny = ctx->rng(2 * diameter + 1) + std::max(y - diameter, 0);
diff --git a/dummy/arch.cc b/dummy/arch.cc
index fb54c74f..58298c4e 100644
--- a/dummy/arch.cc
+++ b/dummy/arch.cc
@@ -141,11 +141,11 @@ const std::vector<PipId> &Arch::getWireAliases(WireId wire) const
 
 // ---------------------------------------------------------------
 
-bool Arch::estimatePosition(BelId bel, int &x, int &y) const
+void Arch::estimatePosition(BelId bel, int &x, int &y, bool &gb) const
 {
-    x = 0.0;
-    y = 0.0;
-    return false;
+    x = 0;
+    y = 0;
+    gb = false;
 }
 
 delay_t Arch::estimateDelay(WireId src, WireId dst) const { return 0.0; }
diff --git a/dummy/arch.h b/dummy/arch.h
index 7ceda3b3..925c231f 100644
--- a/dummy/arch.h
+++ b/dummy/arch.h
@@ -118,7 +118,7 @@ struct Arch : BaseCtx
     const std::vector<PipId> &getPipsUphill(WireId wire) const;
     const std::vector<PipId> &getWireAliases(WireId wire) const;
 
-    bool estimatePosition(BelId bel, int &x, int &y) const;
+    void estimatePosition(BelId bel, int &x, int &y, bool &gb) const;
     delay_t estimateDelay(WireId src, WireId dst) const;
     delay_t getDelayEpsilon() const { return 0.01; }
     float getDelayNS(delay_t v) const { return v; }
diff --git a/ice40/arch.cc b/ice40/arch.cc
index ba372410..3dcd9cb0 100644
--- a/ice40/arch.cc
+++ b/ice40/arch.cc
@@ -295,13 +295,12 @@ std::string Arch::getBelPackagePin(BelId bel) const
 }
 // -----------------------------------------------------------------------
 
-bool Arch::estimatePosition(BelId bel, int &x, int &y) const
+void Arch::estimatePosition(BelId bel, int &x, int &y, bool &gb) const
 {
     assert(bel != BelId());
     x = chip_info->bel_data[bel.index].x;
     y = chip_info->bel_data[bel.index].y;
-
-    return chip_info->bel_data[bel.index].type != TYPE_SB_GB;
+    gb = chip_info->bel_data[bel.index].type == TYPE_SB_GB;
 }
 
 delay_t Arch::estimateDelay(WireId src, WireId dst) const
diff --git a/ice40/arch.h b/ice40/arch.h
index 4a2f6e50..d9631c11 100644
--- a/ice40/arch.h
+++ b/ice40/arch.h
@@ -753,7 +753,7 @@ struct Arch : BaseCtx
 
     // -------------------------------------------------
 
-    bool estimatePosition(BelId bel, int &x, int &y) const;
+    void estimatePosition(BelId bel, int &x, int &y, bool &gb) const;
     delay_t estimateDelay(WireId src, WireId dst) const;
     delay_t getDelayEpsilon() const { return 10; }
     float getDelayNS(delay_t v) const { return v * 0.001; }