diff options
| -rw-r--r-- | common/util.h | 12 | ||||
| -rw-r--r-- | ecp5/bitstream.cc | 14 |
2 files changed, 26 insertions, 0 deletions
diff --git a/common/util.h b/common/util.h index 60eb35af..b492b98c 100644 --- a/common/util.h +++ b/common/util.h @@ -39,6 +39,18 @@ ValueType get_or_default(const Container &ct, const KeyType &key, ValueType def return found->second; }; +// Get a value from a map-style container, returning default if value is not +// found (forces string) +template <typename Container, typename KeyType> +std::string str_or_default(const Container &ct, const KeyType &key, std::string def = "") +{ + auto found = ct.find(key); + if (found == ct.end()) + return def; + else + return found->second; +}; + // Get a value from a map-style container, converting to int, and returning // default if value is not found template <typename Container, typename KeyType> int int_or_default(const Container &ct, const KeyType &key, int def = 0) diff --git a/ecp5/bitstream.cc b/ecp5/bitstream.cc index e44892ed..5f9294c2 100644 --- a/ecp5/bitstream.cc +++ b/ecp5/bitstream.cc @@ -118,6 +118,20 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex int lut1_init = int_or_default(ci->params, ctx->id("LUT1_INITVAL")); cc.tiles[tname].add_word(slice + ".K0.INIT", int_to_bitvector(lut0_init, 16)); cc.tiles[tname].add_word(slice + ".K1.INIT", int_to_bitvector(lut1_init, 16)); + cc.tiles[tname].add_enum(slice + ".MODE", str_or_default(ci->params, ctx->id("MODE"), "LOGIC")); + cc.tiles[tname].add_enum(slice + ".GSR", str_or_default(ci->params, ctx->id("GSR"), "ENABLED")); + cc.tiles[tname].add_enum(slice + ".REG0.SD", str_or_default(ci->params, ctx->id("REG0_SD"), "0")); + cc.tiles[tname].add_enum(slice + ".REG1.SD", str_or_default(ci->params, ctx->id("REG1_SD"), "0")); + cc.tiles[tname].add_enum(slice + ".REG0.REGSET", + str_or_default(ci->params, ctx->id("REG0_REGSET"), "RESET")); + cc.tiles[tname].add_enum(slice + ".REG1.REGSET", + str_or_default(ci->params, ctx->id("REG1_REGSET"), "RESET")); + cc.tiles[tname].add_enum(slice + ".CEMUX", str_or_default(ci->params, ctx->id("CEMUX"), "1")); + // TODO: CLKMUX, CEMUX, carry + } else if (ci->type == ctx->id("TRELLIS_IO")) { + // TODO: IO config + } else { + NPNR_ASSERT_FALSE("unsupported cell type"); } } |