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-rw-r--r--ecp5/cells.cc2
-rw-r--r--ecp5/pack.cc36
-rw-r--r--ecp5/synth/blinky.v4
-rw-r--r--ecp5/synth/counter.v52
4 files changed, 78 insertions, 16 deletions
diff --git a/ecp5/cells.cc b/ecp5/cells.cc
index 22e6a8dc..e3532f36 100644
--- a/ecp5/cells.cc
+++ b/ecp5/cells.cc
@@ -177,7 +177,7 @@ void ff_to_slice(Context *ctx, CellInfo *ff, CellInfo *lc, int index, bool drive
void lut_to_slice(Context *ctx, CellInfo *lut, CellInfo *lc, int index)
{
- lc->params[ctx->id("LUT" + std::to_string(index) + "_INITVAL")] = str_or_default(lc->params, ctx->id("INIT"), "0");
+ lc->params[ctx->id("LUT" + std::to_string(index) + "_INITVAL")] = str_or_default(lut->params, ctx->id("INIT"), "0");
replace_port(lut, ctx->id("A"), lc, ctx->id("A" + std::to_string(index)));
replace_port(lut, ctx->id("B"), lc, ctx->id("B" + std::to_string(index)));
replace_port(lut, ctx->id("C"), lc, ctx->id("C" + std::to_string(index)));
diff --git a/ecp5/pack.cc b/ecp5/pack.cc
index 47f22e55..da5b3ec5 100644
--- a/ecp5/pack.cc
+++ b/ecp5/pack.cc
@@ -71,6 +71,15 @@ class Ecp5Packer
}
}
+ const NetInfo *net_or_nullptr(CellInfo *cell, IdString port)
+ {
+ auto fnd = cell->ports.find(port);
+ if (fnd == cell->ports.end())
+ return nullptr;
+ else
+ return fnd->second.net;
+ }
+
// Return whether two FFs can be packed together in the same slice
bool can_pack_ffs(CellInfo *ff0, CellInfo *ff1)
{
@@ -88,11 +97,11 @@ class Ecp5Packer
if (str_or_default(ff0->params, ctx->id("CLKMUX"), "CLK") !=
str_or_default(ff1->params, ctx->id("CLKMUX"), "CLK"))
return false;
- if (ff0->ports.at(ctx->id("CLK")).net != ff1->ports.at(ctx->id("CLK")).net)
+ if (net_or_nullptr(ff0, ctx->id("CLK")) != net_or_nullptr(ff1, ctx->id("CLK")))
return false;
- if (ff0->ports.at(ctx->id("CE")).net != ff1->ports.at(ctx->id("CE")).net)
+ if (net_or_nullptr(ff0, ctx->id("CE")) != net_or_nullptr(ff1, ctx->id("CE")))
return false;
- if (ff0->ports.at(ctx->id("LSR")).net != ff1->ports.at(ctx->id("LSR")).net)
+ if (net_or_nullptr(ff0, ctx->id("LSR")) != net_or_nullptr(ff1, ctx->id("LSR")))
return false;
return true;
}
@@ -275,6 +284,8 @@ class Ecp5Packer
ff_to_slice(ctx, ff, packed.get(), 0, true);
packed_cells.insert(ff->name);
sliceUsage[packed->name].ff0_used = true;
+ lutffPairs.erase(ci->name);
+ fflutPairs.erase(ff->name);
}
new_cells.push_back(std::move(packed));
@@ -304,10 +315,14 @@ class Ecp5Packer
if (ff0 != lutffPairs.end()) {
ff_to_slice(ctx, ctx->cells.at(ff0->second).get(), slice.get(), 0, true);
packed_cells.insert(ff0->second);
+ lutffPairs.erase(lut0->name);
+ fflutPairs.erase(ff0->second);
}
if (ff1 != lutffPairs.end()) {
ff_to_slice(ctx, ctx->cells.at(ff1->second).get(), slice.get(), 1, true);
packed_cells.insert(ff1->second);
+ lutffPairs.erase(lut1->name);
+ fflutPairs.erase(ff1->second);
}
new_cells.push_back(std::move(slice));
@@ -333,6 +348,8 @@ class Ecp5Packer
if (ff != lutffPairs.end()) {
ff_to_slice(ctx, ctx->cells.at(ff->second).get(), slice.get(), 0, true);
packed_cells.insert(ff->second);
+ lutffPairs.erase(ci->name);
+ fflutPairs.erase(ff->second);
}
new_cells.push_back(std::move(slice));
@@ -374,14 +391,7 @@ class Ecp5Packer
new_init |= (1 << i);
}
}
- cell->params[ctx->id("INIT")] = std::to_string(init);
- NetInfo *innet = cell->ports.at(input).net;
- if (innet != nullptr) {
- innet->users.erase(
- std::remove_if(innet->users.begin(), innet->users.end(),
- [cell, input](PortRef port) { return port.cell == cell && port.port == input; }),
- innet->users.end());
- }
+ cell->params[ctx->id("INIT")] = std::to_string(new_init);
cell->ports.at(input).net = nullptr;
}
@@ -418,7 +428,7 @@ class Ecp5Packer
log_info("Packing constants..\n");
std::unique_ptr<CellInfo> gnd_cell = create_ecp5_cell(ctx, ctx->id("LUT4"), "$PACKER_GND");
- gnd_cell->params[ctx->id("LUT_INIT")] = "0";
+ gnd_cell->params[ctx->id("INIT")] = "0";
std::unique_ptr<NetInfo> gnd_net = std::unique_ptr<NetInfo>(new NetInfo);
gnd_net->name = ctx->id("$PACKER_GND_NET");
gnd_net->driver.cell = gnd_cell.get();
@@ -426,7 +436,7 @@ class Ecp5Packer
gnd_cell->ports.at(ctx->id("Z")).net = gnd_net.get();
std::unique_ptr<CellInfo> vcc_cell = create_ecp5_cell(ctx, ctx->id("LUT4"), "$PACKER_VCC");
- vcc_cell->params[ctx->id("LUT_INIT")] = "65535";
+ vcc_cell->params[ctx->id("INIT")] = "65535";
std::unique_ptr<NetInfo> vcc_net = std::unique_ptr<NetInfo>(new NetInfo);
vcc_net->name = ctx->id("$PACKER_VCC_NET");
vcc_net->driver.cell = vcc_cell.get();
diff --git a/ecp5/synth/blinky.v b/ecp5/synth/blinky.v
index ac7c6ea3..a8f556b2 100644
--- a/ecp5/synth/blinky.v
+++ b/ecp5/synth/blinky.v
@@ -1,4 +1,4 @@
-module top(input clk_pin, input btn_pin, output [3:0] led_pin, output gpio0_pin);
+module top(input clk_pin, input btn_pin, output [7:0] led_pin, output gpio0_pin);
wire clk;
wire [7:0] led;
@@ -72,6 +72,6 @@ module top(input clk_pin, input btn_pin, output [3:0] led_pin, output gpio0_pin)
assign led = led_reg;
// Tie GPIO0, keep board from rebooting
- TRELLIS_SLICE #(.MODE("LOGIC"), .LUT0_INITVAL(16'hFFFF)) vcc (.F0(gpio0));
+ assign gpio0 = 1'b1;
endmodule
diff --git a/ecp5/synth/counter.v b/ecp5/synth/counter.v
new file mode 100644
index 00000000..f2a4b812
--- /dev/null
+++ b/ecp5/synth/counter.v
@@ -0,0 +1,52 @@
+module top(input clk_pin, input btn_pin, output [7:0] led_pin, output gpio0_pin);
+
+ wire clk;
+ wire [7:0] led;
+ wire btn;
+ wire gpio0;
+
+ (* BEL="X0/Y35/PIOA" *) (* IO_TYPE="LVCMOS33" *)
+ TRELLIS_IO #(.DIR("INPUT")) clk_buf (.B(clk_pin), .O(clk));
+
+ (* BEL="X4/Y71/PIOA" *) (* IO_TYPE="LVCMOS33" *) (* keep *)
+ TRELLIS_IO #(.DIR("INPUT")) btn_buf (.B(btn_pin), .O(btn));
+
+ (* BEL="X0/Y23/PIOC" *) (* IO_TYPE="LVCMOS33" *)
+ TRELLIS_IO #(.DIR("OUTPUT")) led_buf_0 (.B(led_pin[0]), .I(led[0]));
+ (* BEL="X0/Y23/PIOD" *) (* IO_TYPE="LVCMOS33" *)
+ TRELLIS_IO #(.DIR("OUTPUT")) led_buf_1 (.B(led_pin[1]), .I(led[1]));
+ (* BEL="X0/Y26/PIOA" *) (* IO_TYPE="LVCMOS33" *)
+ TRELLIS_IO #(.DIR("OUTPUT")) led_buf_2 (.B(led_pin[2]), .I(led[2]));
+ (* BEL="X0/Y26/PIOC" *) (* IO_TYPE="LVCMOS33" *)
+ TRELLIS_IO #(.DIR("OUTPUT")) led_buf_3 (.B(led_pin[3]), .I(led[3]));
+
+ (* BEL="X0/Y26/PIOB" *) (* IO_TYPE="LVCMOS33" *)
+ TRELLIS_IO #(.DIR("OUTPUT")) led_buf_4 (.B(led_pin[4]), .I(led[4]));
+ (* BEL="X0/Y32/PIOD" *) (* IO_TYPE="LVCMOS33" *)
+ TRELLIS_IO #(.DIR("OUTPUT")) led_buf_5 (.B(led_pin[5]), .I(led[5]));
+ (* BEL="X0/Y26/PIOD" *) (* IO_TYPE="LVCMOS33" *)
+ TRELLIS_IO #(.DIR("OUTPUT")) led_buf_6 (.B(led_pin[6]), .I(led[6]));
+ (* BEL="X0/Y29/PIOD" *) (* IO_TYPE="LVCMOS33" *)
+ TRELLIS_IO #(.DIR("OUTPUT")) led_buf_7 (.B(led_pin[7]), .I(led[7]));
+
+
+ (* BEL="X0/Y62/PIOD" *) (* IO_TYPE="LVCMOS33" *)
+ TRELLIS_IO #(.DIR("OUTPUT")) gpio0_buf (.B(gpio0_pin), .I(gpio0));
+
+ localparam ctr_width = 30;
+ localparam ctr_max = 2**ctr_width - 1;
+ reg [ctr_width-1:0] ctr = 0;
+ reg [9:0] pwm_ctr = 0;
+ reg dir = 0;
+
+ always@(posedge clk) begin
+ ctr <= ctr + 1'b1;
+ end
+
+
+ assign led = ctr[ctr_width-1:ctr_width-8];
+
+ // Tie GPIO0, keep board from rebooting
+ assign gpio0 = 1'b1;
+
+endmodule
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-04 01:03:25 +0000