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-rw-r--r--README.md8
-rw-r--r--docs/faq.md8
-rw-r--r--frontend/frontend_base.h2
3 files changed, 9 insertions, 9 deletions
diff --git a/README.md b/README.md
index 1c0acb42..3be6ca99 100644
--- a/README.md
+++ b/README.md
@@ -5,7 +5,7 @@ nextpnr aims to be a vendor neutral, timing driven, FOSS FPGA place and route
tool.
Currently nextpnr supports:
- * Lattice iCE40 devices supported by [Project IceStorm](http://www.clifford.at/icestorm/)
+ * Lattice iCE40 devices supported by [Project IceStorm](http://bygone.clairexen.net/icestorm/)
* Lattice ECP5 devices supported by [Project Trellis](https://github.com/YosysHQ/prjtrellis)
* Lattice Nexus devices supported by [Project Oxide](https://github.com/gatecat/prjoxide)
* Gowin LittleBee devices supported by [Project Apicula](https://github.com/YosysHQ/apicula)
@@ -53,7 +53,7 @@ Getting started
### nextpnr-ice40
-For iCE40 support, install [Project IceStorm](http://www.clifford.at/icestorm/) to `/usr/local` or another location, which should be passed as `-DICESTORM_INSTALL_PREFIX=/usr` to CMake. Then build and install `nextpnr-ice40` using the following commands:
+For iCE40 support, install [Project IceStorm](http://bygone.clairexen.net/icestorm/) to `/usr/local` or another location, which should be passed as `-DICESTORM_INSTALL_PREFIX=/usr` to CMake. Then build and install `nextpnr-ice40` using the following commands:
```
cmake . -DARCH=ice40
@@ -244,13 +244,13 @@ Links and references
### Synthesis, simulation, and logic optimization
-- [Yosys](http://www.clifford.at/yosys/)
+- [Yosys](https://yosyshq.net/yosys/)
- [Icarus Verilog](http://iverilog.icarus.com/)
- [ABC](https://people.eecs.berkeley.edu/~alanmi/abc/)
### FPGA bitstream documentation (and tools) projects
-- [Project IceStorm (Lattice iCE40)](http://www.clifford.at/icestorm/)
+- [Project IceStorm (Lattice iCE40)](http://bygone.clairexen.net/icestorm/)
- [Project Trellis (Lattice ECP5)](https://yosyshq.github.io/prjtrellis-db/)
- [Project X-Ray (Xilinx 7-Series)](https://symbiflow.github.io/prjxray-db/)
- [Project Chibi (Intel MAX-V)](https://github.com/rqou/project-chibi)
diff --git a/docs/faq.md b/docs/faq.md
index 085b2bd7..dbd94bf1 100644
--- a/docs/faq.md
+++ b/docs/faq.md
@@ -137,7 +137,7 @@ Nextpnr and other tools
[Verilog to Routing](https://verilogtorouting.org). If you want to use nextpnr, you might also be able to use the [Generic Arch](generic.md).
* If you are developing FPGA code in **Verilog** for a **Lattice iCE40** and
- need an open source toolchain, we suggest you use [Yosys](http://www.clifford.at/yosys/) and nextpnr.
+ need an open source toolchain, we suggest you use [Yosys](https://yosyshq.net/yosys/) and nextpnr.
* If you are developing FPGA code in **Verilog** for a **Lattice iCE40** with
Yosys and the **existing arachne-pnr toolchain**, we suggest you start thinking about
@@ -151,7 +151,7 @@ Nextpnr and other tools
### Why didn't you just improve [arachne-pnr](https://github.com/cseed/arachne-pnr)?
[arachne-pnr](https://github.com/cseed/arachne-pnr) was originally developed as
-part of [Project IceStorm](http://www.clifford.at/icestorm/) to demonstrate it
+part of [Project IceStorm](http://bygone.clairexen.net/icestorm/) to demonstrate it
was possible to create an open source place and route tool for the iCE40 FPGAs
that actually produced valid bitstreams.
@@ -215,9 +215,9 @@ tooling around bitstream generation for these parts.
While upstream nextpnr currently does **not** support these Xilinx parts, we expect it might soon be using Project X-Ray in a similar manner to Project Trellis.
-### What is [Project IceStorm](http://www.clifford.at/icestorm/)?
+### What is [Project IceStorm](http://bygone.clairexen.net/icestorm/)?
-[Project IceStorm](http://www.clifford.at/icestorm/) is both a project to
+[Project IceStorm](http://bygone.clairexen.net/icestorm/) is both a project to
document the bitstream for the Lattice iCE40 series of parts **and** a full
flow including Yosys and arachne-pnr for converting Verilog into a bitstream
for these parts.
diff --git a/frontend/frontend_base.h b/frontend/frontend_base.h
index ce09a737..6d2ee6f6 100644
--- a/frontend/frontend_base.h
+++ b/frontend/frontend_base.h
@@ -23,7 +23,7 @@
* This is designed to make it possible to build frontends for parsing any format isomorphic to Yosys JSON [1]
* with maximal inlining and minimal need for overhead such as runtime polymorphism or extra wrapper types.
*
- * [1] http://www.clifford.at/yosys/cmd_write_json.html
+ * [1] https://yosyshq.net/yosys/cmd_write_json.html
*
* The frontend should implement a class referred to as FrontendType that defines the following type(def)s and
* functions: