diff options
author | gatecat <gatecat@ds0.me> | 2022-08-10 10:57:17 +0100 |
---|---|---|
committer | gatecat <gatecat@ds0.me> | 2022-08-10 10:57:46 +0100 |
commit | 77c82b0fbf15892b0c8222bac89564f3f024493e (patch) | |
tree | 8b189e44b65afabfaddb3402ab8aac544df9ba83 /nexus | |
parent | 06ce27ed38279cfa3455e248ea2b2c773cdf6324 (diff) | |
download | nextpnr-77c82b0fbf15892b0c8222bac89564f3f024493e.tar.gz nextpnr-77c82b0fbf15892b0c8222bac89564f3f024493e.tar.bz2 nextpnr-77c82b0fbf15892b0c8222bac89564f3f024493e.zip |
refactor: id(stringf(...)) to new idf(...) helper
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'nexus')
-rw-r--r-- | nexus/arch.cc | 10 | ||||
-rw-r--r-- | nexus/fasm.cc | 4 | ||||
-rw-r--r-- | nexus/pack.cc | 51 |
3 files changed, 31 insertions, 34 deletions
diff --git a/nexus/arch.cc b/nexus/arch.cc index 9679c3fb..b2ae22ce 100644 --- a/nexus/arch.cc +++ b/nexus/arch.cc @@ -125,12 +125,12 @@ Arch::Arch(ArchArgs args) : args(args) } for (int i = 0; i < chip_info->width; i++) { - IdString x_id = id(stringf("X%d", i)); + IdString x_id = idf("X%d", i); x_ids.push_back(x_id); id_to_x[x_id] = i; } for (int i = 0; i < chip_info->height; i++) { - IdString y_id = id(stringf("Y%d", i)); + IdString y_id = idf("Y%d", i); y_ids.push_back(y_id); id_to_y[y_id] = i; } @@ -377,7 +377,7 @@ IdStringList Arch::getPipName(PipId pip) const { NPNR_ASSERT(pip != PipId()); std::array<IdString, 5> ids{x_ids.at(pip.tile % chip_info->width), y_ids.at(pip.tile / chip_info->width), - id(stringf("%d", pip.index)), IdString(loc_data(pip).wires[pip_data(pip).to_wire].name), + idf("%d", pip.index), IdString(loc_data(pip).wires[pip_data(pip).to_wire].name), IdString(loc_data(pip).wires[pip_data(pip).from_wire].name)}; return IdStringList(ids); } @@ -784,7 +784,7 @@ bool Arch::route() CellPinMux Arch::get_cell_pinmux(const CellInfo *cell, IdString pin) const { - IdString param = id(stringf("%sMUX", pin.c_str(this))); + IdString param = idf("%sMUX", pin.c_str(this)); auto fnd_param = cell->params.find(param); if (fnd_param == cell->params.end()) return PINMUX_SIG; @@ -805,7 +805,7 @@ CellPinMux Arch::get_cell_pinmux(const CellInfo *cell, IdString pin) const void Arch::set_cell_pinmux(CellInfo *cell, IdString pin, CellPinMux state) { - IdString param = id(stringf("%sMUX", pin.c_str(this))); + IdString param = idf("%sMUX", pin.c_str(this)); switch (state) { case PINMUX_SIG: cell->params.erase(param); diff --git a/nexus/fasm.cc b/nexus/fasm.cc index de03fb82..48a3d259 100644 --- a/nexus/fasm.cc +++ b/nexus/fasm.cc @@ -595,7 +595,7 @@ struct NexusFasmWriter if (wid > 0) { push(stringf("IP_EBR_WID%d", wid)); for (int i = 0; i < 64; i++) { - IdString param = ctx->id(stringf("INITVAL_%02X", i)); + IdString param = ctx->idf("INITVAL_%02X", i); if (!cell->params.count(param)) continue; auto &prop = cell->params.at(param); @@ -906,7 +906,7 @@ struct NexusFasmWriter l.x = 1; push(stringf("IP_LRAM_CORE_R%dC%d", l.y, l.x)); for (int i = 0; i < 128; i++) { - IdString param = ctx->id(stringf("INITVAL_%02X", i)); + IdString param = ctx->idf("INITVAL_%02X", i); if (!cell->params.count(param)) continue; auto &prop = cell->params.at(param); diff --git a/nexus/pack.cc b/nexus/pack.cc index 15752171..0aa61144 100644 --- a/nexus/pack.cc +++ b/nexus/pack.cc @@ -316,8 +316,8 @@ struct NexusPacker return z; } - NetInfo *new_net = ctx->createNet(ctx->id(stringf("$CONST_%s_NET_", type.c_str(ctx)))); - CellInfo *new_cell = ctx->createCell(ctx->id(stringf("$CONST_%s_DRV_", type.c_str(ctx))), type); + NetInfo *new_net = ctx->createNet(ctx->idf("$CONST_%s_NET_", type.c_str(ctx))); + CellInfo *new_cell = ctx->createCell(ctx->idf("$CONST_%s_DRV_", type.c_str(ctx)), type); new_cell->addOutput(id_Z); new_cell->connectPort(id_Z, new_net); return new_net; @@ -823,10 +823,10 @@ struct NexusPacker Tpred pred) { // Create the buffered net - NetInfo *buffered_net = ctx->createNet(ctx->id(stringf("%s$%s", ctx->nameOf(net), name_postfix.c_str()))); + NetInfo *buffered_net = ctx->createNet(ctx->idf("%s$%s", ctx->nameOf(net), name_postfix.c_str())); // Create the buffer cell - CellInfo *buffer = ctx->createCell( - ctx->id(stringf("%s$drv_%s", ctx->nameOf(buffered_net), ctx->nameOf(buffer_type))), buffer_type); + CellInfo *buffer = ctx->createCell(ctx->idf("%s$drv_%s", ctx->nameOf(buffered_net), ctx->nameOf(buffer_type)), + buffer_type); buffer->addInput(i); buffer->addOutput(o); // Drive the buffered net with the buffer @@ -915,9 +915,9 @@ struct NexusPacker } // Get a bus port name - IdString bus(const std::string &base, int i) { return ctx->id(stringf("%s[%d]", base.c_str(), i)); } + IdString bus(const std::string &base, int i) { return ctx->idf("%s[%d]", base.c_str(), i); } - IdString bus_flat(const std::string &base, int i) { return ctx->id(stringf("%s%d", base.c_str(), i)); } + IdString bus_flat(const std::string &base, int i) { return ctx->idf("%s%d", base.c_str(), i); } // Pack a LUTRAM into COMB and RAMW cells void pack_lutram() @@ -939,11 +939,10 @@ struct NexusPacker for (CellInfo *ci : lutrams) { // Create constituent cells - CellInfo *ramw = ctx->createCell(ctx->id(stringf("%s$lutram_ramw$", ctx->nameOf(ci))), id_RAMW); + CellInfo *ramw = ctx->createCell(ctx->idf("%s$lutram_ramw$", ctx->nameOf(ci)), id_RAMW); std::vector<CellInfo *> combs; for (int i = 0; i < 4; i++) - combs.push_back( - ctx->createCell(ctx->id(stringf("%s$lutram_comb[%d]$", ctx->nameOf(ci), i)), id_OXIDE_COMB)); + combs.push_back(ctx->createCell(ctx->idf("%s$lutram_comb[%d]$", ctx->nameOf(ci), i), id_OXIDE_COMB)); // Rewiring - external WCK and WRE ci->movePortTo(id_WCK, ramw, id_CLK); ci->movePortTo(id_WRE, ramw, id_LSR); @@ -951,8 +950,8 @@ struct NexusPacker // Internal WCK and WRE signals ramw->addOutput(id_WCKO); ramw->addOutput(id_WREO); - NetInfo *int_wck = ctx->createNet(ctx->id(stringf("%s$lutram_wck$", ctx->nameOf(ci)))); - NetInfo *int_wre = ctx->createNet(ctx->id(stringf("%s$lutram_wre$", ctx->nameOf(ci)))); + NetInfo *int_wck = ctx->createNet(ctx->idf("%s$lutram_wck$", ctx->nameOf(ci))); + NetInfo *int_wre = ctx->createNet(ctx->idf("%s$lutram_wre$", ctx->nameOf(ci))); ramw->connectPort(id_WCKO, int_wck); ramw->connectPort(id_WREO, int_wre); @@ -977,7 +976,7 @@ struct NexusPacker ci->disconnectPort(bus("RAD", i)); } // Write address - internal - NetInfo *int_wad = ctx->createNet(ctx->id(stringf("%s$lutram_wad[%d]$", ctx->nameOf(ci), i))); + NetInfo *int_wad = ctx->createNet(ctx->idf("%s$lutram_wad[%d]$", ctx->nameOf(ci), i)); ramw->addOutput(bus_flat("WADO", i)); ramw->connectPort(bus_flat("WADO", i), int_wad); for (int j = 0; j < 4; j++) { @@ -985,7 +984,7 @@ struct NexusPacker combs[j]->connectPort(bus_flat("WAD", i), int_wad); } // Write data - internal - NetInfo *int_wd = ctx->createNet(ctx->id(stringf("%s$lutram_wd[%d]$", ctx->nameOf(ci), i))); + NetInfo *int_wd = ctx->createNet(ctx->idf("%s$lutram_wd[%d]$", ctx->nameOf(ci), i)); ramw->addOutput(bus_flat("WDO", i)); ramw->connectPort(bus_flat("WDO", i), int_wd); combs[i]->addInput(id_WDI); @@ -1256,8 +1255,7 @@ struct NexusPacker for (CellInfo *ci : widefns) { std::vector<CellInfo *> combs; for (int i = 0; i < 2; i++) - combs.push_back( - ctx->createCell(ctx->id(stringf("%s$widefn_comb[%d]$", ctx->nameOf(ci), i)), id_OXIDE_COMB)); + combs.push_back(ctx->createCell(ctx->idf("%s$widefn_comb[%d]$", ctx->nameOf(ci), i), id_OXIDE_COMB)); for (int i = 0; i < 2; i++) { ci->movePortTo(bus_flat("A", i), combs[i], id_A); @@ -1269,7 +1267,7 @@ struct NexusPacker ci->movePortTo(id_SEL, combs[0], id_SEL); ci->movePortTo(id_Z, combs[0], id_OFX); - NetInfo *f1 = ctx->createNet(ctx->id(stringf("%s$widefn_f1$", ctx->nameOf(ci)))); + NetInfo *f1 = ctx->createNet(ctx->idf("%s$widefn_f1$", ctx->nameOf(ci))); combs[0]->addInput(id_F1); combs[1]->addOutput(id_F); combs[1]->connectPort(id_F, f1); @@ -1313,8 +1311,7 @@ struct NexusPacker // Split the carry into two COMB cells std::vector<CellInfo *> combs; for (int i = 0; i < 2; i++) - combs.push_back( - ctx->createCell(ctx->id(stringf("%s$ccu2_comb[%d]$", ctx->nameOf(ci), i)), id_OXIDE_COMB)); + combs.push_back(ctx->createCell(ctx->idf("%s$ccu2_comb[%d]$", ctx->nameOf(ci), i), id_OXIDE_COMB)); // Rewire LUT ports for (int i = 0; i < 2; i++) { combs[i]->params[id_MODE] = std::string("CCU2"); @@ -1336,7 +1333,7 @@ struct NexusPacker combs[1]->params[id_INIT] = ctx->parse_lattice_param_from_cell(ci, id_INIT1, 16, 0); // Internal carry net between the two split COMB cells - NetInfo *int_cy = ctx->createNet(ctx->id(stringf("%s$widefn_int_cy$", ctx->nameOf(ci)))); + NetInfo *int_cy = ctx->createNet(ctx->idf("%s$widefn_int_cy$", ctx->nameOf(ci))); combs[0]->addOutput(id_FCO); combs[1]->addInput(id_FCI); combs[0]->connectPort(id_FCO, int_cy); @@ -1550,7 +1547,7 @@ struct NexusPacker // Create a DSP cell CellInfo *create_dsp_cell(IdString base_name, IdString type, CellInfo *constr_base, int dx, int dz) { - IdString name = ctx->id(stringf("%s/%s_x%d_z%d", ctx->nameOf(base_name), ctx->nameOf(type), dx, dz)); + IdString name = ctx->idf("%s/%s_x%d_z%d", ctx->nameOf(base_name), ctx->nameOf(type), dx, dz); CellInfo *cell = ctx->createCell(name, type); if (constr_base != nullptr) { // We might be constraining against an already-constrained cell @@ -1739,10 +1736,10 @@ struct NexusPacker if (mt.wide > 0) { // Dot-product mode special case - ci->copyPortBusTo(ctx->id(stringf("B%d", (i * 9) / mt.wide)), (i * 9) % mt.wide, true, preadd9[i], - id_B, 0, false, 9); - ci->copyPortBusTo(ctx->id(stringf("A%d", (i * 9) / mt.wide)), (i * 9) % mt.wide, true, mult9[i], - id_A, 0, false, 9); + ci->copyPortBusTo(ctx->idf("B%d", (i * 9) / mt.wide), (i * 9) % mt.wide, true, preadd9[i], id_B, 0, + false, 9); + ci->copyPortBusTo(ctx->idf("A%d", (i * 9) / mt.wide), (i * 9) % mt.wide, true, mult9[i], id_A, 0, + false, 9); ci->copyPortTo(id_CLK, mult9[i], id_CLK); ci->copyPortTo((i > 1) ? id_CEA2A3 : id_CEA0A1, mult9[i], id_CEA); ci->copyPortTo((i > 1) ? id_RSTA2A3 : id_RSTA0A1, mult9[i], id_RSTA); @@ -1750,8 +1747,8 @@ struct NexusPacker ci->copyPortTo((i > 1) ? id_CEB2B3 : id_CEB0B1, preadd9[i], id_CEB); ci->copyPortTo((i > 1) ? id_RSTB2B3 : id_RSTB0B1, preadd9[i], id_RSTB); // Copy register configuration - copy_param(ci, ctx->id(stringf("REGINPUTAB%d", i)), mult9[i], id_REGBYPSA1); - copy_param(ci, ctx->id(stringf("REGINPUTAB%d", i)), preadd9[i], id_REGBYPSBR0); + copy_param(ci, ctx->idf("REGINPUTAB%d", i), mult9[i], id_REGBYPSA1); + copy_param(ci, ctx->idf("REGINPUTAB%d", i), preadd9[i], id_REGBYPSBR0); } else { // B input split across pre-adders ci->copyPortBusTo(id_B, b_start, true, preadd9[i], id_B, 0, false, 9); |