nexus: Rework how constant pins work

Signed-off-by: David Shah <dave@ds0.me>

3 files changed, 111 insertions, 39 deletions

diff --git a/nexus/arch.h b/nexus/arch.h
index b9d6fb3e..0b058bd7 100644
--- a/nexus/arch.h
+++ b/nexus/arch.h
@@ -754,6 +754,36 @@ struct WireBelPinRange
 
 // -----------------------------------------------------------------------
 
+// This enum captures different 'styles' of cell pins
+// This is a combination of the modes available for a pin (tied high, low or inverted)
+// and the default value to set it to not connected
+enum CellPinStyle
+{
+    PINOPT_NONE = 0x0, // no options, just signal as-is
+    PINOPT_HI = 0x1,   // can be tied low
+    PINOPT_LO = 0x2,   // can be tied high
+    PINOPT_INV = 0x4,  // can be inverted
+
+    PINOPT_LOHI = 0x3,    // can be tied low or high
+    PINOPT_LOHIINV = 0x7, // can be tied low or high; or inverted
+
+    PINDEF_NONE = 0x00, // leave disconnected
+    PINDEF_0 = 0x10,    // connect to 0 if not used
+    PINDEF_1 = 0x20,    // connect to 1 if not used
+
+    PINSTYLE_CIB = 0x11,  // 'CIB' signal, floats high but explicitly zeroed if not used
+    PINSTYLE_CLK = 0x07,  // CLK type signal, invertible and defaults to disconnected
+    PINSTYLE_CE = 0x27,   // CE type signal, invertible and defaults to enabled
+    PINSTYLE_LSR = 0x17,  // LSR type signal, invertible and defaults to not reset
+    PINSTYLE_DEDI = 0x00, // dedicated signals, leave alone
+    PINSTYLE_PU = 0x21,   // signals that float high and default high
+
+    PINSTYLE_INV_PD = 0x17, // invertible, pull down by default
+    PINSTYLE_INV_PU = 0x27, // invertible, pull up by default
+};
+
+// -----------------------------------------------------------------------
+
 const int bba_version =
 #include "bba_version.inc"
         ;
@@ -1308,14 +1338,9 @@ struct Arch : BaseCtx
 
     // -------------------------------------------------
 
-    // Get a map cell type -> pins that can be inverted
-    void get_invertible_pins(std::unordered_map<IdString, std::unordered_set<IdString>> &pins) const;
-    // Get a map cell -> pin -> value _it takes_ if disconnected
-    void get_pins_floating_value(std::unordered_map<IdString, std::unordered_map<IdString, bool>> &pins) const;
-    // Get a map cell -> pin -> value _it must be connected to_ if disconnected
-    // Default value for all pins, if not specified is 0
-    void
-    get_pins_default_value(std::unordered_map<IdString, std::unordered_map<IdString, Property::State>> &pins) const;
+    typedef std::unordered_map<IdString, CellPinStyle> CellPinsData;
+
+    void get_cell_pin_data(std::unordered_map<IdString, CellPinsData> &cell_pins);
 
     // -------------------------------------------------
 
diff --git a/nexus/constids.inc b/nexus/constids.inc
index d37857a6..3ee93ea7 100644
--- a/nexus/constids.inc
+++ b/nexus/constids.inc
@@ -110,5 +110,26 @@ X(OSC_CORE)
 X(HFCLKOUT)
 X(LFCLKOUT)
 X(HF_CLK_DIV)
-
-
+X(HFOUTEN)
+
+X(OXIDE_EBR)
+X(CLKA)
+X(CLKB)
+X(CEA)
+X(CEB)
+X(CSA0)
+X(CSA1)
+X(CSA2)
+X(CSB0)
+X(CSB1)
+X(CSB2)
+X(ADA0)
+X(ADA1)
+X(ADA2)
+X(ADA3)
+X(ADB0)
+X(ADB1)
+X(WEA)
+X(WEB)
+X(RSTA)
+X(RSTB)
diff --git a/nexus/pins.cc b/nexus/pins.cc
index 5627f557..fc540059 100644
--- a/nexus/pins.cc
+++ b/nexus/pins.cc
@@ -22,32 +22,58 @@
 
 NEXTPNR_NAMESPACE_BEGIN
 
-void Arch::get_invertible_pins(std::unordered_map<IdString, std::unordered_set<IdString>> &pins) const
-{
-    pins[id_OXIDE_FF] = {id_CLK, id_LSR, id_CE};
-    pins[id_RAMW] = {id_WCK};
-    pins[id_SEIO18_CORE] = {id_T};
-    pins[id_SEIO33_CORE] = {id_T};
-}
-
-void Arch::get_pins_floating_value(std::unordered_map<IdString, std::unordered_map<IdString, bool>> &pins) const
-{
-    pins[id_OXIDE_COMB] = {{id_A, true}, {id_B, true}, {id_C, true}, {id_D, true}, {id_SEL, true}};
-    pins[id_OXIDE_FF] = {{id_CLK, false}, {id_LSR, true}, {id_CE, true}};
-    pins[id_SEIO18_CORE] = {{id_T, true}};
-    pins[id_SEIO33_CORE] = {{id_T, true}};
-}
-
-void Arch::get_pins_default_value(
-        std::unordered_map<IdString, std::unordered_map<IdString, Property::State>> &pins) const
-{
-    pins[id_OXIDE_COMB] = {{id_A, Property::S1},    {id_B, Property::S1},    {id_C, Property::S1},
-                           {id_D, Property::S1},    {id_SEL, Property::S1},  {id_WAD0, Property::Sx},
-                           {id_WAD1, Property::Sx}, {id_WAD2, Property::Sx}, {id_WAD3, Property::Sx},
-                           {id_WCK, Property::Sx},  {id_WRE, Property::Sx},  {id_WD, Property::Sx}};
-    pins[id_OXIDE_FF] = {{id_CE, Property::S1}, {id_DI, Property::Sx}};
-    pins[id_SEIO18_CORE] = {{id_T, Property::S1}};
-    pins[id_SEIO33_CORE] = {{id_T, Property::S1}};
-}
-
-NEXTPNR_NAMESPACE_END
\ No newline at end of file
+namespace {
+
+static const std::unordered_map<IdString, Arch::CellPinsData> base_cell_pin_data = {
+        {id_OXIDE_COMB,
+         {
+                 {id_WCK, PINSTYLE_DEDI},
+                 {id_WRE, PINSTYLE_DEDI},
+
+                 {id_FCI, PINSTYLE_DEDI},
+                 {id_WAD0, PINSTYLE_DEDI},
+                 {id_WAD1, PINSTYLE_DEDI},
+                 {id_WAD2, PINSTYLE_DEDI},
+                 {id_WAD3, PINSTYLE_DEDI},
+                 {id_WD, PINSTYLE_DEDI},
+
+                 {{}, PINSTYLE_PU},
+         }},
+        {id_OXIDE_FF,
+         {
+                 {id_CLK, PINSTYLE_CLK},
+                 {id_LSR, PINSTYLE_LSR},
+                 {id_CE, PINSTYLE_CE},
+                 {{}, PINSTYLE_DEDI},
+         }},
+        {id_SEIO18_CORE,
+         {
+                 {id_T, PINSTYLE_CE},
+                 {id_B, PINSTYLE_DEDI},
+                 {{}, PINSTYLE_INV_PU},
+         }},
+        {id_SEIO33_CORE,
+         {
+                 {id_T, PINSTYLE_CE},
+                 {id_B, PINSTYLE_DEDI},
+                 {{}, PINSTYLE_INV_PU},
+         }},
+        {id_OXIDE_EBR, {{id_CLKA, PINSTYLE_CLK},    {id_CLKB, PINSTYLE_CLK},    {id_CEA, PINSTYLE_CE},
+                        {id_CEB, PINSTYLE_CE},      {id_CSA0, PINSTYLE_PU},     {id_CSA1, PINSTYLE_PU},
+                        {id_CSA2, PINSTYLE_PU},     {id_CSB0, PINSTYLE_PU},     {id_CSB1, PINSTYLE_PU},
+                        {id_CSB2, PINSTYLE_PU},     {id_ADA0, PINSTYLE_INV_PD}, {id_ADA1, PINSTYLE_INV_PD},
+                        {id_ADA2, PINSTYLE_INV_PD}, {id_ADA2, PINSTYLE_INV_PD}, {id_ADA3, PINSTYLE_INV_PD},
+                        {id_ADB0, PINSTYLE_INV_PD}, {id_ADB1, PINSTYLE_INV_PD}, {id_WEA, PINSTYLE_INV_PD},
+                        {id_WEB, PINSTYLE_INV_PD},  {id_RSTA, PINSTYLE_INV_PD}, {id_RSTB, PINSTYLE_INV_PD},
+                        {{}, PINSTYLE_CIB}}},
+        {id_OSC_CORE,
+         {
+                 {id_HFOUTEN, PINSTYLE_PU},
+                 {{}, PINSTYLE_CIB},
+         }},
+};
+} // namespace
+
+void Arch::get_cell_pin_data(std::unordered_map<IdString, CellPinsData> &cell_pins) { cell_pins = base_cell_pin_data; }
+
+NEXTPNR_NAMESPACE_END