Mistral: Use log_error, remove leftover debugging printf.

3 files changed, 39 insertions, 37 deletions

diff --git a/mistral/arch.cc b/mistral/arch.cc
index 034ecb98..f61d07ab 100644
--- a/mistral/arch.cc
+++ b/mistral/arch.cc
@@ -43,6 +43,42 @@ void IdString::initialize_arch(const BaseCtx *ctx)
 #undef X
 }
 
+CycloneV::rnode_t Arch::find_rnode(CycloneV::block_type_t bt, int x, int y, CycloneV::port_type_t port, int bi, int pi) const
+{
+    auto pn1 = CycloneV::pnode(bt, x, y, port, bi, pi);
+    auto rn1 = cyclonev->pnode_to_rnode(pn1);
+    if(rn1)
+        return rn1;
+
+    if(bt == CycloneV::GPIO) {
+        auto pn2 = cyclonev->p2p_to(pn1);
+        if(!pn2) {
+            auto pnv = cyclonev->p2p_from(pn1);
+            if(!pnv.empty())
+                pn2 = pnv[0];
+        }
+        auto pn3 = cyclonev->hmc_get_bypass(pn2);
+        auto rn2 = cyclonev->pnode_to_rnode(pn3);
+        return rn2;
+    }
+
+    return 0;
+}
+
+WireId Arch::get_port(CycloneV::block_type_t bt, int x, int y, int bi, CycloneV::port_type_t port, int pi) const
+{
+    auto rn = find_rnode(bt, x, y, port, bi, pi);
+    if(rn)
+        return WireId(rn);
+    
+    log_error("Trying to connect unknown node %s\n", CycloneV::pn2s(CycloneV::pnode(bt, x, y, port, bi, pi)).c_str());
+}
+
+bool Arch::has_port(CycloneV::block_type_t bt, int x, int y, int bi, CycloneV::port_type_t port, int pi) const
+{
+    return find_rnode(bt, x, y, port, bi, pi) != 0;
+}
+
 Arch::Arch(ArchArgs args)
 {
     this->args = args;
diff --git a/mistral/arch.h b/mistral/arch.h
index 98340d4e..e931df2d 100644
--- a/mistral/arch.h
+++ b/mistral/arch.h
@@ -461,42 +461,9 @@ struct Arch : BaseArch<ArchRanges>
 
     void add_bel_pin(BelId bel, IdString pin, PortType dir, WireId wire);
 
-    CycloneV::rnode_t find_rnode(CycloneV::block_type_t bt, int x, int y, CycloneV::port_type_t port, int bi = -1, int pi = -1) const
-    {
-        auto pn1 = CycloneV::pnode(bt, x, y, port, bi, pi);
-        auto rn1 = cyclonev->pnode_to_rnode(pn1);
-        if(rn1)
-            return rn1;
-
-        if(bt == CycloneV::GPIO) {
-            auto pn2 = cyclonev->p2p_to(pn1);
-            if(!pn2) {
-                auto pnv = cyclonev->p2p_from(pn1);
-                if(!pnv.empty())
-                    pn2 = pnv[0];
-            }
-            auto pn3 = cyclonev->hmc_get_bypass(pn2);
-            auto rn2 = cyclonev->pnode_to_rnode(pn3);
-            return rn2;
-        }
-
-        return 0;
-    }
-
-    WireId get_port(CycloneV::block_type_t bt, int x, int y, int bi, CycloneV::port_type_t port, int pi = -1) const
-    {
-        auto rn = find_rnode(bt, x, y, port, bi, pi);
-        if(rn)
-            return WireId(rn);
-
-        fprintf(stderr, "Trying to connect unknown node %s\n", CycloneV::pn2s(CycloneV::pnode(bt, x, y, port, bi, pi)).c_str());
-        exit(1);
-    }
-
-    bool has_port(CycloneV::block_type_t bt, int x, int y, int bi, CycloneV::port_type_t port, int pi = -1) const
-    {
-        return find_rnode(bt, x, y, port, bi, pi) != 0;
-    }
+    CycloneV::rnode_t find_rnode(CycloneV::block_type_t bt, int x, int y, CycloneV::port_type_t port, int bi = -1, int pi = -1) const;
+    WireId get_port(CycloneV::block_type_t bt, int x, int y, int bi, CycloneV::port_type_t port, int pi = -1) const;
+    bool has_port(CycloneV::block_type_t bt, int x, int y, int bi, CycloneV::port_type_t port, int pi = -1) const;
 
     void create_lab(int x, int y, bool is_mlab);       // lab.cc
     void create_gpio(int x, int y);                    // io.cc
diff --git a/mistral/bitstream.cc b/mistral/bitstream.cc
index 33079727..340f4b96 100644
--- a/mistral/bitstream.cc
+++ b/mistral/bitstream.cc
@@ -97,7 +97,6 @@ struct MistralBitgen
 
             // Output gpios must also bypass things in the associated dqs
             auto dqs = cv->p2p_to(CycloneV::pnode(CycloneV::GPIO, pos, CycloneV::PNONE, bi, -1));
-            printf("%s -> %s\n", CycloneV::pn2s(CycloneV::pnode(CycloneV::GPIO, pos, CycloneV::PNONE, bi, -1)).c_str(), CycloneV::pn2s(dqs).c_str());
             if(dqs) {
                 cv->bmux_m_set(CycloneV::DQS16, CycloneV::pn2p(dqs), CycloneV::INPUT_REG4_SEL, CycloneV::pn2bi(dqs), CycloneV::SEL_LOCKED_DPA);
                 cv->bmux_r_set(CycloneV::DQS16, CycloneV::pn2p(dqs), CycloneV::RB_T9_SEL_EREG_CFF_DELAY, CycloneV::pn2bi(dqs), 0x1f);