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| author | gatecat <gatecat@ds0.me> | 2021-05-15 10:26:27 +0100 |
|---|---|---|
| committer | gatecat <gatecat@ds0.me> | 2021-05-15 14:54:33 +0100 |
| commit | 9221acc9e211766d79d7c7dde5d5fc8bb053354d (patch) | |
| tree | 406159fd26ce543165b729cb441c486195d707d6 /mistral/arch.h | |
| parent | 4d32c4f2fcb5c5e5ca21100f4473acb2c4cda3b0 (diff) | |
| download | nextpnr-9221acc9e211766d79d7c7dde5d5fc8bb053354d.tar.gz nextpnr-9221acc9e211766d79d7c7dde5d5fc8bb053354d.tar.bz2 nextpnr-9221acc9e211766d79d7c7dde5d5fc8bb053354d.zip | |
mistral: Fix ENA and ACLR bitstream generation
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'mistral/arch.h')
| -rw-r--r-- | mistral/arch.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/mistral/arch.h b/mistral/arch.h index 97d6a2b1..2360fb20 100644 --- a/mistral/arch.h +++ b/mistral/arch.h @@ -65,6 +65,7 @@ struct LABInfo std::array<WireId, 2> aclr_wires; WireId sclr_wire, sload_wire; // TODO: LAB configuration (control set etc) + std::array<bool, 2> aclr_used; }; struct PinInfo |