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authorgatecat <gatecat@ds0.me>2021-12-22 13:54:30 +0000
committerLofty <dan.ravensloft@gmail.com>2022-03-09 17:13:54 +0000
commitda65afc83b83f02efa96e9a7735f7044a1f1e6d1 (patch)
treedcf57e53ce35f1c4c2a6ba4171e8ae782fe606f3 /mistral/arch.cc
parent78474a5dec13236214c8e15906c40a05ae6ed4af (diff)
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mistral: M10K pack fixes
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'mistral/arch.cc')
-rw-r--r--mistral/arch.cc2
1 files changed, 2 insertions, 0 deletions
diff --git a/mistral/arch.cc b/mistral/arch.cc
index 6ba16939..46ed4f62 100644
--- a/mistral/arch.cc
+++ b/mistral/arch.cc
@@ -410,6 +410,8 @@ void Arch::add_bel_pin(BelId bel, IdString pin, PortType dir, WireId wire)
void Arch::assign_default_pinmap(CellInfo *cell)
{
+ if (cell->type == id_MISTRAL_M10K)
+ return; // M10Ks always have a custom pinmap
for (auto &port : cell->ports) {
auto &pinmap = cell->pin_data[port.first].bel_pins;
if (!pinmap.empty())